dts: atmel: sam: cleanup flash / sram nodes

Move flash node under flash controller and sram nodes under soc as it
is for most SoC dts files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-04-09 08:18:27 -05:00 committed by Kumar Gala
parent 85f0e8631a
commit c5153a2d2a
21 changed files with 173 additions and 111 deletions

View file

@ -23,18 +23,12 @@
};
};
soc {
sram0: memory@20070000 {
compatible = "mmio-sram";
reg = <0x20070000 0x18000>;
};
flash0: flash@80000 {
compatible = "soc-nv-flash";
label = "FLASH_0";
reg = <0x00080000 0x80000>;
};
soc {
/* Only used for HWINFO device ID */
eefc: flash-controller@400e0a00 {
compatible = "atmel,sam-flash-controller";
@ -44,6 +38,12 @@
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@80000 {
compatible = "soc-nv-flash";
label = "FLASH_0";
reg = <0x00080000 0x80000>;
};
};
wdt: watchdog@400e1a50 {

View file

@ -24,16 +24,11 @@
};
};
soc {
sram0: memory@20000000 {
compatible = "mmio-sram";
};
flash0: flash@400000 {
compatible = "soc-nv-flash";
label = "FLASH_0";
};
soc {
/* Only used for HWINFO device ID */
eefc: flash-controller@400e0a00 {
compatible = "atmel,sam-flash-controller";
@ -43,6 +38,11 @@
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@400000 {
compatible = "soc-nv-flash";
label = "FLASH_0";
};
};
wdt: watchdog@400e1850 {

View file

@ -8,11 +8,15 @@
#include <atmel/sam4e.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(1024)>;
};
};
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(128)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4e.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(1024)>;
};
};
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(128)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4e.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(512)>;
};
};
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(128)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4e.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(512)>;
};
};
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(128)>;
};
};
};

View file

@ -25,16 +25,11 @@
};
};
soc {
sram0: memory@20100000 {
compatible = "mmio-sram";
};
flash0: flash@400000 {
compatible = "soc-nv-flash";
label = "FLASH_0";
};
soc {
/* Only used for HWINFO device ID */
eefc: flash-controller@400e0a00 {
compatible = "atmel,sam-flash-controller";
@ -44,6 +39,11 @@
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@400000 {
compatible = "soc-nv-flash";
label = "FLASH_0";
};
};
wdt: watchdog@400e1450 {

View file

@ -8,11 +8,15 @@
#include <atmel/sam4s.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(1024)>;
};
};
sram0: memory@20100000 {
reg = <0x20100000 DT_SIZE_K(128)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4s.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(1024)>;
};
};
sram0: memory@20100000 {
reg = <0x20100000 DT_SIZE_K(128)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4s.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(128)>;
};
};
sram0: memory@20100000 {
reg = <0x20100000 DT_SIZE_K(64)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4s.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(128)>;
};
};
sram0: memory@20100000 {
reg = <0x20100000 DT_SIZE_K(64)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4s.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(128)>;
};
};
sram0: memory@20100000 {
reg = <0x20100000 DT_SIZE_K(64)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4s.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(256)>;
};
};
sram0: memory@20100000 {
reg = <0x20100000 DT_SIZE_K(64)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4s.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(356)>;
};
};
sram0: memory@20100000 {
reg = <0x20100000 DT_SIZE_K(64)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4s.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(256)>;
};
};
sram0: memory@20100000 {
reg = <0x20100000 DT_SIZE_K(64)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4s.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(512)>;
};
};
sram0: memory@20100000 {
reg = <0x20100000 DT_SIZE_K(128)>;
};
};
};

View file

@ -8,11 +8,15 @@
#include <atmel/sam4s.dtsi>
/ {
soc {
flash-controller@400e0a00 {
flash0: flash@400000 {
reg = <0x00400000 DT_SIZE_K(512)>;
};
};
sram0: memory@20100000 {
reg = <0x20100000 DT_SIZE_K(128)>;
};
};
};

View file

@ -50,12 +50,6 @@
};
soc {
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "FLASH_0";
write-block-size = <512>;
};
sram0: memory@20000000 {
compatible = "mmio-sram";
reg = <0x20000000 0x40000>;
@ -83,6 +77,12 @@
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "FLASH_0";
write-block-size = <512>;
};
};
dma: dmac@4100A000 {

View file

@ -9,9 +9,11 @@
/ {
soc {
nvmctrl@41004000 {
flash0: flash@0 {
reg = <0x0 DT_SIZE_K(256)>;
};
};
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(128)>;

View file

@ -9,9 +9,11 @@
/ {
soc {
nvmctrl@41004000 {
flash0: flash@0 {
reg = <0x0 DT_SIZE_K(512)>;
};
};
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(192)>;

View file

@ -9,9 +9,11 @@
/ {
soc {
nvmctrl@41004000 {
flash0: flash@0 {
reg = <0x0 DT_SIZE_K(1024)>;
};
};
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(256)>;