soc: nordic_nrf: Add definition of nRF52805 SoC
Add definition of the nRF52805 SoC together with the corresponding dts files. Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek
Ioannis Glaropoulos
parent
ad44bed754
commit
c519184211
223
dts/arm/nordic/nrf52805.dtsi
Normal file
223
dts/arm/nordic/nrf52805.dtsi
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@ -0,0 +1,223 @@
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/*
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* Copyright (c) 2020 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "nrf5_common.dtsi"
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/ {
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chosen {
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zephyr,entropy = &rng;
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zephyr,flash-controller = &flash_controller;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4";
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reg = <0>;
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};
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};
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soc {
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flash_controller: flash-controller@4001e000 {
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compatible = "nordic,nrf52-flash-controller";
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reg = <0x4001e000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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label = "NRF_FLASH_DRV_NAME";
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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label = "NRF_FLASH";
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erase-block-size = <4096>;
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write-block-size = <4>;
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};
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};
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sram0: memory@20000000 {
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compatible = "mmio-sram";
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};
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adc: adc@40007000 {
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compatible = "nordic,nrf-saadc";
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reg = <0x40007000 0x1000>;
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interrupts = <7 1>;
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status = "disabled";
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label = "ADC_0";
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#io-channel-cells = <1>;
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};
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clock: clock@40000000 {
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compatible = "nordic,nrf-clock";
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reg = <0x40000000 0x1000>;
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interrupts = <0 1>;
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status = "okay";
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label = "CLOCK";
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};
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gpio0: gpio@50000000 {
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compatible = "nordic,nrf-gpio";
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gpio-controller;
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reg = <0x50000000 0x1000>;
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#gpio-cells = <2>;
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label = "GPIO_0";
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status = "disabled";
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};
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gpiote: gpiote@40006000 {
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compatible = "nordic,nrf-gpiote";
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reg = <0x40006000 0x1000>;
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interrupts = <6 5>;
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status = "disabled";
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label = "GPIOTE_0";
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};
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i2c0: i2c@40003000 {
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/*
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* This i2c node can be TWI, TWIM, or TWIS,
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* for the user to pick:
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* compatible = "nordic,nrf-twi" or
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* "nordic,nrf-twim" or
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* "nordic,nrf-twis".
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*/
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003000 0x1000>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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interrupts = <3 1>;
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status = "disabled";
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label = "I2C_0";
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};
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/* Disabled until MDK is updated to provide QDEC definition and bitfields. */
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#if 0
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qdec: qdec@40012000 {
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compatible = "nordic,nrf-qdec";
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reg = <0x40012000 0x1000>;
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interrupts = <18 1>;
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status = "disabled";
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label = "QDEC";
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};
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#endif
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rng: random@4000d000 {
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compatible = "nordic,nrf-rng";
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reg = <0x4000d000 0x1000>;
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interrupts = <13 1>;
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status = "okay";
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label = "RNG";
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};
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rtc0: rtc@4000b000 {
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compatible = "nordic,nrf-rtc";
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reg = <0x4000b000 0x1000>;
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interrupts = <11 1>;
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status = "okay";
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clock-frequency = <32768>;
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prescaler = <1>;
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label = "RTC_0";
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};
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rtc1: rtc@40011000 {
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compatible = "nordic,nrf-rtc";
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reg = <0x40011000 0x1000>;
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interrupts = <17 1>;
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status = "okay";
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clock-frequency = <32768>;
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prescaler = <1>;
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label = "RTC_1";
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};
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spi0: spi@40004000 {
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/*
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* This spi node can be SPI, SPIM, or SPIS,
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* for the user to pick:
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* compatible = "nordic,nrf-spi" or
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* "nordic,nrf-spim" or
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* "nordic,nrf-spis".
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*/
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40004000 0x1000>;
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interrupts = <4 1>;
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status = "disabled";
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label = "SPI_0";
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};
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timer0: timer@40008000 {
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compatible = "nordic,nrf-timer";
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status = "okay";
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reg = <0x40008000 0x1000>;
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interrupts = <8 1>;
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prescaler = <0>;
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label = "TIMER_0";
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};
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timer1: timer@40009000 {
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compatible = "nordic,nrf-timer";
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status = "okay";
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reg = <0x40009000 0x1000>;
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interrupts = <9 1>;
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prescaler = <0>;
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label = "TIMER_1";
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};
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timer2: timer@4000a000 {
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compatible = "nordic,nrf-timer";
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status = "okay";
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reg = <0x4000a000 0x1000>;
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interrupts = <10 1>;
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prescaler = <0>;
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label = "TIMER_2";
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};
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temp: temp@4000c000 {
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compatible = "nordic,nrf-temp";
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reg = <0x4000c000 0x1000>;
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interrupts = <12 1>;
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status = "okay";
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label = "TEMP_0";
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};
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uart0: uart@40002000 {
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/* uart can be either UART or UARTE, for the user to pick */
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/* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */
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reg = <0x40002000 0x1000>;
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interrupts = <2 1>;
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status = "disabled";
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label = "UART_0";
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};
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wdt: wdt0: watchdog@40010000 {
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compatible = "nordic,nrf-watchdog";
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reg = <0x40010000 0x1000>;
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interrupts = <16 1>;
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status = "okay";
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label = "WDT";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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&sw_pwm {
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timer-instance = <2>;
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channel-count = <3>;
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clock-prescaler = <0>;
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ppi-base = <7>;
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gpiote-base = <0>;
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#pwm-cells = <1>;
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};
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22
dts/arm/nordic/nrf52805_caaa.dtsi
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22
dts/arm/nordic/nrf52805_caaa.dtsi
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@ -0,0 +1,22 @@
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/*
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* Copyright (c) 2020 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <nordic/nrf52805.dtsi>
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&flash0 {
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reg = <0x00000000 DT_SIZE_K(192)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(24)>;
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};
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/ {
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soc {
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compatible = "nordic,nRF52805-CAAA", "nordic,nRF52805", "nordic,nRF52", "simple-bus";
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};
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};
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14
soc/arm/nordic_nrf/nrf52/Kconfig.defconfig.nrf52805_CAAA
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14
soc/arm/nordic_nrf/nrf52/Kconfig.defconfig.nrf52805_CAAA
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@ -0,0 +1,14 @@
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# Nordic Semiconductor nRF52805 MCU
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# Copyright (c) 2020 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if SOC_NRF52805_CAAA
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config SOC
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default "nRF52805_CAAA"
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config NUM_IRQS
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default 26
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endif # SOC_NRF52805_CAAA
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@ -3,6 +3,45 @@
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# Copyright (c) 2016-2019 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config SOC_NRF52805
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depends on SOC_SERIES_NRF52X
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bool
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select HAS_HW_NRF_BPROT
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select HAS_HW_NRF_CCM
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select HAS_HW_NRF_CLOCK
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select HAS_HW_NRF_ECB
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select HAS_HW_NRF_EGU0
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select HAS_HW_NRF_EGU1
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select HAS_HW_NRF_GPIO0
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select HAS_HW_NRF_GPIOTE
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select HAS_HW_NRF_NVMC_PE
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select HAS_HW_NRF_POWER
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select HAS_HW_NRF_PPI
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select HAS_HW_NRF_QDEC
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select HAS_HW_NRF_RNG
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select HAS_HW_NRF_RTC0
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select HAS_HW_NRF_RTC1
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select HAS_HW_NRF_SAADC
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select HAS_HW_NRF_SPI0
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select HAS_HW_NRF_SPIM0
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select HAS_HW_NRF_SPIS0
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select HAS_HW_NRF_SWI0
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select HAS_HW_NRF_SWI1
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select HAS_HW_NRF_SWI2
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select HAS_HW_NRF_SWI3
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select HAS_HW_NRF_SWI4
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select HAS_HW_NRF_SWI5
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select HAS_HW_NRF_TEMP
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select HAS_HW_NRF_TIMER0
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select HAS_HW_NRF_TIMER1
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select HAS_HW_NRF_TIMER2
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select HAS_HW_NRF_TWI0
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select HAS_HW_NRF_TWIM0
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select HAS_HW_NRF_TWIS0
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select HAS_HW_NRF_UART0
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select HAS_HW_NRF_UARTE0
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select HAS_HW_NRF_WDT
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config SOC_NRF52810
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depends on SOC_SERIES_NRF52X
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bool
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@ -360,6 +399,10 @@ choice
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prompt "nRF52x MCU Selection"
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depends on SOC_SERIES_NRF52X
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config SOC_NRF52805_CAAA
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bool "NRF52805_CAAA"
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select SOC_NRF52805
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config SOC_NRF52810_QFAA
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bool "NRF52810_QFAA"
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select SOC_NRF52810
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@ -26,7 +26,9 @@ extern void z_arm_nmi_init(void);
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#define NMI_INIT()
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#endif
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#if defined(CONFIG_SOC_NRF52810)
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#if defined(CONFIG_SOC_NRF52805)
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#include <system_nrf52805.h>
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#elif defined(CONFIG_SOC_NRF52810)
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#include <system_nrf52810.h>
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#elif defined(CONFIG_SOC_NRF52811)
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#include <system_nrf52811.h>
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