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drivers: all: rv32m1: remove conditional support for pinctrl

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The rvm32m1 platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2023-04-19 16:45:15 +02:00 committed by Carles Cufí
parent c4c5f57d59
commit c66f594c41
8 changed files with 13 additions and 68 deletions
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1
drivers/i2c/Kconfig
View file

@ -172,6 +172,7 @@ config I2C_RV32M1_LPI2C
default y
depends on DT_HAS_OPENISA_RV32M1_LPI2C_ENABLED
depends on CLOCK_CONTROL
select PINCTRL
help
Enable the RV32M1 LPI2C driver.

19
drivers/i2c/i2c_rv32m1_lpi2c.c
View file

@ -15,9 +15,7 @@
#include <zephyr/irq.h>
#include <fsl_lpi2c.h>
#include <zephyr/logging/log.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h>
#endif
LOG_MODULE_REGISTER(rv32m1_lpi2c);
@ -31,9 +29,7 @@ struct rv32m1_lpi2c_config {
uint32_t clock_ip_src;
uint32_t bitrate;
void (*irq_config_func)(const struct device *dev);
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg;
#endif
};
struct rv32m1_lpi2c_data {
@ -248,12 +244,11 @@ static int rv32m1_lpi2c_init(const struct device *dev)
return err;
}
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err != 0) {
return err;
}
#endif
config->irq_config_func(dev);
return 0;
@ -264,16 +259,8 @@ static const struct i2c_driver_api rv32m1_lpi2c_driver_api = {
.transfer = rv32m1_lpi2c_transfer,
};
#ifdef CONFIG_PINCTRL
#define PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#define PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#else
#define PINCTRL_DEFINE(n)
#define PINCTRL_INIT(n)
#endif
#define RV32M1_LPI2C_DEVICE(id) \
PINCTRL_DEFINE(id) \
PINCTRL_DT_INST_DEFINE(n); \
static void rv32m1_lpi2c_irq_config_func_##id(const struct device *dev); \
static const struct rv32m1_lpi2c_config rv32m1_lpi2c_##id##_config = { \
.base = \
@ -285,7 +272,7 @@ static const struct i2c_driver_api rv32m1_lpi2c_driver_api = {
.clock_ip_src = kCLOCK_IpSrcFircAsync, \
.bitrate = DT_INST_PROP(id, clock_frequency), \
.irq_config_func = rv32m1_lpi2c_irq_config_func_##id, \
PINCTRL_INIT(id) \
.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
}; \
static struct rv32m1_lpi2c_data rv32m1_lpi2c_##id##_data = { \
.transfer_sync = Z_SEM_INITIALIZER( \

1
drivers/pwm/Kconfig.rv32m1_tpm
View file

@ -8,5 +8,6 @@ config PWM_RV32M1_TPM
default y
depends on DT_HAS_OPENISA_RV32M1_TPM_ENABLED
depends on CLOCK_CONTROL
select PINCTRL
help
Enable the RV32M1 TPM PWM driver.

20
drivers/pwm/pwm_rv32m1_tpm.c
View file

@ -15,9 +15,7 @@
#include <soc.h>
#include <fsl_tpm.h>
#include <fsl_clock.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h>
#endif
#include <zephyr/logging/log.h>
@ -33,9 +31,7 @@ struct rv32m1_tpm_config {
tpm_clock_prescale_t prescale;
uint8_t channel_count;
tpm_pwm_mode_t mode;
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg;
#endif
};
struct rv32m1_tpm_data {
@ -137,9 +133,7 @@ static int rv32m1_tpm_init(const struct device *dev)
struct rv32m1_tpm_data *data = dev->data;
tpm_chnl_pwm_signal_param_t *channel = data->channel;
tpm_config_t tpm_config;
#ifdef CONFIG_PINCTRL
int err;
#endif
int i;
if (config->channel_count > ARRAY_SIZE(data->channel)) {
@ -171,12 +165,10 @@ static int rv32m1_tpm_init(const struct device *dev)
channel++;
}
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err) {
return err;
}
#endif
TPM_GetDefaultConfig(&tpm_config);
tpm_config.prescale = config->prescale;
@ -191,16 +183,8 @@ static const struct pwm_driver_api rv32m1_tpm_driver_api = {
.get_cycles_per_sec = rv32m1_tpm_get_cycles_per_sec,
};
#ifdef CONFIG_PINCTRL
#define PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#define PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#else
#define PINCTRL_DEFINE(n)
#define PINCTRL_INIT(n)
#endif
#define TPM_DEVICE(n) \
PINCTRL_DEFINE(n) \
PINCTRL_DT_INST_DEFINE(n); \
static const struct rv32m1_tpm_config rv32m1_tpm_config_##n = { \
.base = (TPM_Type *) \
DT_INST_REG_ADDR(n), \
@ -212,7 +196,7 @@ static const struct pwm_driver_api rv32m1_tpm_driver_api = {
.channel_count = FSL_FEATURE_TPM_CHANNEL_COUNTn((TPM_Type *) \
DT_INST_REG_ADDR(n)), \
.mode = kTPM_EdgeAlignedPwm, \
PINCTRL_INIT(n) \
.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
}; \
static struct rv32m1_tpm_data rv32m1_tpm_data_##n; \
DEVICE_DT_INST_DEFINE(n, &rv32m1_tpm_init, NULL, \

1
drivers/serial/Kconfig.rv32m1_lpuart
View file

@ -10,5 +10,6 @@ config UART_RV32M1_LPUART
depends on CLOCK_CONTROL
select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT
select PINCTRL
help
Enable the RV32M1 LPUART driver.

20
drivers/serial/uart_rv32m1_lpuart.c
View file

@ -14,9 +14,7 @@
#include <zephyr/irq.h>
#include <fsl_lpuart.h>
#include <soc.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h>
#endif
struct rv32m1_lpuart_config {
LPUART_Type *base;
@ -29,9 +27,7 @@ struct rv32m1_lpuart_config {
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
void (*irq_config_func)(const struct device *dev);
#endif
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg;
#endif
};
struct rv32m1_lpuart_data {
@ -247,9 +243,7 @@ static int rv32m1_lpuart_init(const struct device *dev)
const struct rv32m1_lpuart_config *config = dev->config;
lpuart_config_t uart_config;
uint32_t clock_freq;
#ifdef CONFIG_PINCTRL
int err;
#endif
/* set clock source */
/* TODO: Don't change if another core has configured */
@ -275,12 +269,10 @@ static int rv32m1_lpuart_init(const struct device *dev)
LPUART_Init(config->base, &uart_config, clock_freq);
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err != 0) {
return err;
}
#endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
config->irq_config_func(dev);
@ -311,14 +303,6 @@ static const struct uart_driver_api rv32m1_lpuart_driver_api = {
#endif
};
#ifdef CONFIG_PINCTRL
#define PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#define PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#else
#define PINCTRL_DEFINE(n)
#define PINCTRL_INIT(n)
#endif
#define RV32M1_LPUART_DECLARE_CFG(n, IRQ_FUNC_INIT) \
static const struct rv32m1_lpuart_config rv32m1_lpuart_##n##_cfg = {\
.base = (LPUART_Type *)DT_INST_REG_ADDR(n), \
@ -329,7 +313,7 @@ static const struct uart_driver_api rv32m1_lpuart_driver_api = {
.clock_ip_src = kCLOCK_IpSrcFircAsync, \
.baud_rate = DT_INST_PROP(n, current_speed), \
.hw_flow_control = DT_INST_PROP(n, hw_flow_control), \
PINCTRL_INIT(n) \
.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
IRQ_FUNC_INIT \
}
@ -354,7 +338,7 @@ static const struct uart_driver_api rv32m1_lpuart_driver_api = {
#endif
#define RV32M1_LPUART_INIT(n) \
PINCTRL_DEFINE(n) \
PINCTRL_DT_INST_DEFINE(n); \
\
static struct rv32m1_lpuart_data rv32m1_lpuart_##n##_data; \
\

1
drivers/spi/Kconfig.rv32m1_lpspi
View file

@ -8,5 +8,6 @@ config SPI_RV32M1_LPSPI
default y
depends on DT_HAS_OPENISA_RV32M1_LPSPI_ENABLED
depends on CLOCK_CONTROL
select PINCTRL
help
Enable the RV32M1 LPSPI driver.

18
drivers/spi/spi_rv32m1_lpspi.c
View file

@ -12,9 +12,7 @@
#include <zephyr/drivers/spi.h>
#include <zephyr/drivers/clock_control.h>
#include <fsl_lpspi.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h>
#endif
#define LOG_LEVEL CONFIG_SPI_LOG_LEVEL
#include <zephyr/logging/log.h>
@ -33,9 +31,7 @@ struct spi_mcux_config {
clock_ip_name_t clock_ip_name;
uint32_t clock_ip_src;
void (*irq_config_func)(const struct device *dev);
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg;
#endif
};
struct spi_mcux_data {
@ -288,12 +284,10 @@ static int spi_mcux_init(const struct device *dev)
return err;
}
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err != 0) {
return err;
}
#endif
spi_context_unlock_unconditionally(&data->ctx);
@ -308,16 +302,8 @@ static const struct spi_driver_api spi_mcux_driver_api = {
.release = spi_mcux_release,
};
#ifdef CONFIG_PINCTRL
#define PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#define PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#else
#define PINCTRL_DEFINE(n)
#define PINCTRL_INIT(n)
#endif
#define SPI_RV32M1_INIT(n) \
PINCTRL_DEFINE(n) \
PINCTRL_DT_INST_DEFINE(n); \
\
static void spi_mcux_config_func_##n(const struct device *dev); \
\
@ -329,7 +315,7 @@ static const struct spi_driver_api spi_mcux_driver_api = {
.irq_config_func = spi_mcux_config_func_##n, \
.clock_ip_name = INST_DT_CLOCK_IP_NAME(n), \
.clock_ip_src = kCLOCK_IpSrcFircAsync, \
PINCTRL_INIT(n) \
.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
}; \
\
static struct spi_mcux_data spi_mcux_data_##n = { \