boards: arm: apollo4p_evb Shield Support
Correct pinctrl for rev2 board. Rename IOM properly in ambiq_apollo4p.dtsi Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
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d2e090d1b1
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c6f21b2017
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@ -98,6 +98,7 @@
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};
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group2 {
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pinmux = <NCE11_P11>;
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drive-strength = "0.5";
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drive-push-pull;
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ambiq,iom-nce-module = <4>;
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};
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@ -69,7 +69,7 @@
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status = "okay";
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};
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&iom0 {
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&iom0_i2c {
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compatible = "ambiq,i2c";
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pinctrl-0 = <&i2c0_default>;
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pinctrl-names = "default";
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@ -77,7 +77,7 @@
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status = "okay";
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};
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&iom1 {
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&iom1_spi {
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compatible = "ambiq,spi";
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pinctrl-0 = <&spi1_default>;
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pinctrl-names = "default";
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@ -91,6 +91,18 @@
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status = "okay";
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};
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&mspi1 {
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pinctrl-0 = <&mspi1_default>;
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pinctrl-names = "default";
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status = "okay";
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};
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&mspi2 {
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pinctrl-0 = <&mspi2_default>;
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pinctrl-names = "default";
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status = "okay";
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};
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&gpio0_31 {
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status = "okay";
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};
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@ -118,4 +118,4 @@
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};
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};
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ambiq_spi: &iom1 {};
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spi1: &iom1_spi {};
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@ -106,7 +106,7 @@
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ambiq,pwrcfg = <&pwrcfg 0x4 0x1000>;
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};
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iom0: iom@40050000 {
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iom0_spi: spi@40050000 {
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reg = <0x40050000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -115,7 +115,16 @@
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ambiq,pwrcfg = <&pwrcfg 0x4 0x2>;
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};
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iom1: iom@40051000 {
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iom0_i2c: i2c@40050000 {
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reg = <0x40050000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <6 0>;
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status = "disabled";
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ambiq,pwrcfg = <&pwrcfg 0x4 0x2>;
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};
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iom1_spi: spi@40051000 {
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reg = <0x40051000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -124,7 +133,16 @@
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ambiq,pwrcfg = <&pwrcfg 0x4 0x4>;
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};
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iom2: iom@40052000 {
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iom1_i2c: i2c@40051000 {
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reg = <0x40051000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <7 0>;
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status = "disabled";
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ambiq,pwrcfg = <&pwrcfg 0x4 0x4>;
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};
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iom2_spi: spi@40052000 {
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reg = <0x40052000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -133,7 +151,16 @@
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ambiq,pwrcfg = <&pwrcfg 0x4 0x8>;
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};
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iom3: iom@40053000 {
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iom2_i2c: i2c@40052000 {
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reg = <0x40052000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <8 0>;
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status = "disabled";
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ambiq,pwrcfg = <&pwrcfg 0x4 0x8>;
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};
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iom3_spi: spi@40053000 {
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reg = <0x40053000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -141,7 +168,17 @@
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status = "disabled";
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ambiq,pwrcfg = <&pwrcfg 0x4 0x10>;
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};
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iom4: iom@40054000 {
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iom3_i2c: i2c@40053000 {
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reg = <0x40053000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <9 0>;
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status = "disabled";
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ambiq,pwrcfg = <&pwrcfg 0x4 0x10>;
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};
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iom4_spi: spi@40054000 {
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reg = <0x40054000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -150,7 +187,16 @@
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ambiq,pwrcfg = <&pwrcfg 0x4 0x20>;
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};
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iom5: iom@40055000 {
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iom4_i2c: i2c@40054000 {
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reg = <0x40054000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <10 0>;
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status = "disabled";
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ambiq,pwrcfg = <&pwrcfg 0x4 0x20>;
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};
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iom5_spi: spi@40055000 {
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reg = <0x40055000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -159,7 +205,16 @@
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ambiq,pwrcfg = <&pwrcfg 0x4 0x40>;
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};
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iom6: iom@40056000 {
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iom5_i2c: i2c@40055000 {
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reg = <0x40055000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <11 0>;
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status = "disabled";
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ambiq,pwrcfg = <&pwrcfg 0x4 0x40>;
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};
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iom6_spi: spi@40056000 {
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reg = <0x40056000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -168,7 +223,25 @@
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ambiq,pwrcfg = <&pwrcfg 0x4 0x80>;
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};
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iom7: iom@40057000 {
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iom6_i2c: i2c@40056000 {
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reg = <0x40056000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <12 0>;
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status = "disabled";
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ambiq,pwrcfg = <&pwrcfg 0x4 0x80>;
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};
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iom7_spi: spi@40057000 {
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reg = <0x40057000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <13 0>;
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status = "disabled";
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ambiq,pwrcfg = <&pwrcfg 0x4 0x100>;
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};
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iom7_i2c: i2c@40057000 {
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reg = <0x40057000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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