drivers: gpio: sam: Update to use clock control

This update Atmel SAM gpio and pinctrl drivers to use clock control
drivers.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit is contained in:
Gerson Fernando Budke 2023-03-05 23:04:27 +01:00 committed by Marti Bolivar
parent f21c936d49
commit c77c1cc197
10 changed files with 60 additions and 47 deletions

View file

@ -1,5 +1,6 @@
/*
* Copyright (c) 2018 Justin Watson
* Copyright (c) 2023 Gerson Fernando Budke
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -12,6 +13,7 @@
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/clock_control/atmel_sam_pmc.h>
#include <zephyr/dt-bindings/gpio/atmel-sam-gpio.h>
#include <zephyr/irq.h>
@ -24,7 +26,8 @@ struct gpio_sam_config {
struct gpio_driver_config common;
Pio *regs;
config_func_t config_func;
uint32_t periph_id;
const struct atmel_sam_pmc_config clock_cfg;
};
struct gpio_sam_runtime {
@ -305,8 +308,9 @@ int gpio_sam_init(const struct device *dev)
{
const struct gpio_sam_config * const cfg = dev->config;
/* The peripheral clock must be enabled for the interrupts to work. */
soc_pmc_peripheral_enable(cfg->periph_id);
/* Enable GPIO clock in PMC. This is necessary to enable interrupts */
(void)clock_control_on(SAM_DT_PMC_CONTROLLER,
(clock_control_subsys_t *)&cfg->clock_cfg);
cfg->config_func(dev);
@ -321,7 +325,7 @@ int gpio_sam_init(const struct device *dev)
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n),\
}, \
.regs = (Pio *)DT_INST_REG_ADDR(n), \
.periph_id = DT_INST_PROP(n, peripheral_id), \
.clock_cfg = SAM_DT_INST_CLOCK_PMC_CFG(n), \
.config_func = port_##n##_sam_config_func, \
}; \
\

View file

@ -1,6 +1,6 @@
/*
* Copyright (c) 2018 Justin Watson
* Copyright (c) 2020 Gerson Fernando Budke <nandojve@gmail.com>
* Copyright (c) 2020-2023 Gerson Fernando Budke <nandojve@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -13,6 +13,7 @@
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/clock_control/atmel_sam_pmc.h>
#include <zephyr/irq.h>
#include <zephyr/drivers/gpio/gpio_utils.h>
@ -24,7 +25,8 @@ struct gpio_sam_config {
struct gpio_driver_config common;
Gpio *regs;
config_func_t config_func;
uint32_t periph_id;
const struct atmel_sam_pmc_config clock_cfg;
};
struct gpio_sam_runtime {
@ -230,7 +232,9 @@ int gpio_sam_init(const struct device *dev)
{
const struct gpio_sam_config * const cfg = dev->config;
soc_pmc_peripheral_enable(cfg->periph_id);
/* Enable GPIO clock in PM */
(void)clock_control_on(SAM_DT_PMC_CONTROLLER,
(clock_control_subsys_t *)&cfg->clock_cfg);
cfg->config_func(dev);
@ -254,7 +258,7 @@ int gpio_sam_init(const struct device *dev)
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n),\
}, \
.regs = (Gpio *)DT_INST_REG_ADDR(n), \
.periph_id = DT_INST_PROP(n, peripheral_id), \
.clock_cfg = SAM_DT_INST_CLOCK_PMC_CFG(n), \
.config_func = port_##n##_sam_config_func, \
}; \
\

View file

@ -1,10 +1,11 @@
/*
* Copyright (c) 2022, Gerson Fernando Budke <nandojve@gmail.com>
* Copyright (c) 2022-2023, Gerson Fernando Budke <nandojve@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/clock_control/atmel_sam_pmc.h>
#include <soc_gpio.h>
/** Utility macro that expands to the GPIO port address if it exists */
@ -13,9 +14,9 @@
(DT_REG_ADDR(DT_NODELABEL(nodelabel)),))
/** Utility macro that expands to the GPIO Peripheral ID if it exists */
#define SAM_PORT_PERIPH_ID_OR_NONE(nodelabel) \
#define SAM_PORT_CLOCKS_OR_NONE(nodelabel) \
IF_ENABLED(DT_NODE_EXISTS(DT_NODELABEL(nodelabel)), \
(DT_PROP(DT_NODELABEL(nodelabel), peripheral_id),))
(SAM_DT_CLOCK_PMC_CFG(0, DT_NODELABEL(nodelabel)),))
/** SAM port addresses */
static const uint32_t sam_port_addrs[] = {
@ -33,19 +34,19 @@ static const uint32_t sam_port_addrs[] = {
#endif
};
/** SAM port peripheral id */
static const uint32_t sam_port_periph_id[] = {
/** SAM port clocks */
static const struct atmel_sam_pmc_config sam_port_clocks[] = {
#ifdef ID_GPIO
SAM_PORT_PERIPH_ID_OR_NONE(gpioa)
SAM_PORT_PERIPH_ID_OR_NONE(gpiob)
SAM_PORT_PERIPH_ID_OR_NONE(gpioc)
SAM_PORT_CLOCKS_OR_NONE(gpioa)
SAM_PORT_CLOCKS_OR_NONE(gpiob)
SAM_PORT_CLOCKS_OR_NONE(gpioc)
#else
SAM_PORT_PERIPH_ID_OR_NONE(pioa)
SAM_PORT_PERIPH_ID_OR_NONE(piob)
SAM_PORT_PERIPH_ID_OR_NONE(pioc)
SAM_PORT_PERIPH_ID_OR_NONE(piod)
SAM_PORT_PERIPH_ID_OR_NONE(pioe)
SAM_PORT_PERIPH_ID_OR_NONE(piof)
SAM_PORT_CLOCKS_OR_NONE(pioa)
SAM_PORT_CLOCKS_OR_NONE(piob)
SAM_PORT_CLOCKS_OR_NONE(pioc)
SAM_PORT_CLOCKS_OR_NONE(piod)
SAM_PORT_CLOCKS_OR_NONE(pioe)
SAM_PORT_CLOCKS_OR_NONE(piof)
#endif
};
@ -63,7 +64,7 @@ static void pinctrl_configure_pin(pinctrl_soc_pin_t pin)
#else
soc_pin.regs = (Pio *) sam_port_addrs[port_idx];
#endif
soc_pin.periph_id = sam_port_periph_id[port_idx];
soc_pin.periph_id = sam_port_clocks[port_idx].peripheral_id;
soc_pin.mask = 1 << SAM_PINMUX_PIN_GET(pin);
soc_pin.flags = SAM_PINCTRL_FLAGS_GET(pin) << SOC_GPIO_FLAGS_POS;

View file

@ -146,7 +146,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e0e00 0x190>;
interrupts = <11 1>;
peripheral-id = <11>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -156,7 +156,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1000 0x190>;
interrupts = <12 1>;
peripheral-id = <12>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -166,7 +166,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1200 0x190>;
interrupts = <13 1>;
peripheral-id = <13>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -176,7 +176,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1400 0x190>;
interrupts = <14 1>;
peripheral-id = <14>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -186,7 +186,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1600 0x190>;
interrupts = <15 1>;
peripheral-id = <15>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;

View file

@ -165,7 +165,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e0e00 0x200>;
interrupts = <9 1>;
peripheral-id = <9>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -175,7 +175,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1000 0x200>;
interrupts = <10 1>;
peripheral-id = <10>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -185,7 +185,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1200 0x200>;
interrupts = <11 1>;
peripheral-id = <11>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -195,7 +195,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1400 0x200>;
interrupts = <12 1>;
peripheral-id = <12>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -205,7 +205,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1600 0x200>;
interrupts = <13 1>;
peripheral-id = <13>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;

View file

@ -180,7 +180,7 @@
compatible = "atmel,sam4l-gpio";
reg = <0x400e1000 0x200>;
interrupts = <25 1>, <26 1>, <27 1>, <28 1>;
peripheral-id = <68>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 68>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -189,7 +189,7 @@
compatible = "atmel,sam4l-gpio";
reg = <0x400e1200 0x200>;
interrupts = <29 1>, <30 1>, <31 1>, <32 1>;
peripheral-id = <68>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 68>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -198,7 +198,7 @@
compatible = "atmel,sam4l-gpio";
reg = <0x400e1400 0x200>;
interrupts = <33 1>, <34 1>, <35 1>, <36 1>;
peripheral-id = <68>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 68>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;

View file

@ -162,7 +162,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e0e00 0x190>;
interrupts = <11 1>;
peripheral-id = <11>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -172,7 +172,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1000 0x190>;
interrupts = <12 1>;
peripheral-id = <12>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -182,7 +182,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1200 0x190>;
interrupts = <13 1>;
peripheral-id = <13>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;

View file

@ -236,7 +236,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e0e00 0x190>;
interrupts = <10 1>;
peripheral-id = <10>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -246,7 +246,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1000 0x190>;
interrupts = <11 1>;
peripheral-id = <11>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -256,7 +256,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1200 0x190>;
interrupts = <12 1>;
peripheral-id = <12>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -266,7 +266,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1400 0x190>;
interrupts = <16 1>;
peripheral-id = <16>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
@ -276,7 +276,7 @@
compatible = "atmel,sam-gpio";
reg = <0x400e1600 0x190>;
interrupts = <17 1>;
peripheral-id = <17>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;

View file

@ -1,3 +1,6 @@
# Copyright (c) 2021-2023, Gerson Fernando Budke <nandojve@gmail.com>
# SPDX-License-Identifier: Apache-2.0
description: SAM GPIO PORT node
compatible: "atmel,sam-gpio"
@ -11,9 +14,7 @@ properties:
interrupts:
required: true
peripheral-id:
type: int
description: peripheral ID
clocks:
required: true
"#gpio-cells":

View file

@ -1,3 +1,6 @@
# Copyright (c) 2021-2023, Gerson Fernando Budke <nandojve@gmail.com>
# SPDX-License-Identifier: Apache-2.0
description: SAM4L GPIO PORT node
compatible: "atmel,sam4l-gpio"