soc/xtensa: Removing useless DMA definitions for intel s1000
These information are now provided through DTS. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
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@ -49,25 +49,6 @@
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/* GPIO */
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#define GPIO_DW_PORT_0_INT_MASK 0
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/* low power DMACs */
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#define LP_GP_DMA_SIZE 0x00001000
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#define DW_DMA0_BASE_ADDR 0x0007C000
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#define DW_DMA1_BASE_ADDR (0x0007C000 +\
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1 * LP_GP_DMA_SIZE)
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#define DW_DMA2_BASE_ADDR (0x0007C000 +\
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2 * LP_GP_DMA_SIZE)
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#define DW_DMA0_IRQ 0x00001110
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#define DW_DMA1_IRQ 0x0000010A
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#define DW_DMA2_IRQ 0x0000010D
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/* address of DMA ownership register. We need to properly configure
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* this register in order to access the DMA registers.
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*/
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#define CAVS_DMA0_OWNERSHIP_REG (0x00071A60)
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#define CAVS_DMA1_OWNERSHIP_REG (0x00071A62)
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#define CAVS_DMA2_OWNERSHIP_REG (0x00071A64)
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#define DMA_HANDSHAKE_DMIC_RXA 0
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#define DMA_HANDSHAKE_DMIC_RXB 1
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#define DMA_HANDSHAKE_SSP0_TX 2
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