drivers: clock_control_mcux_syscon: Add MRT subsys
Add code to handle MRT subsys clock to LPC syscon driver Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
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@ -19,12 +19,19 @@ static int mcux_lpc_syscon_clock_control_on(const struct device *dev,
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clock_control_subsys_t sub_system)
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{
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#if defined(CONFIG_CAN_MCUX_MCAN)
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uint32_t clock_name = (uint32_t)sub_system;
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if (clock_name == MCUX_MCAN_CLK) {
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if ((uint32_t)sub_system == MCUX_MCAN_CLK) {
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CLOCK_EnableClock(kCLOCK_Mcan);
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}
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#endif /* defined(CONFIG_CAN_MCUX_MCAN) */
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#if defined(CONFIG_COUNTER_NXP_MRT)
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if ((uint32_t)sub_system == MCUX_MRT_CLK) {
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#if defined(CONFIG_SOC_FAMILY_LPC)
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CLOCK_EnableClock(kCLOCK_Mrt);
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#elif defined(CONFIG_SOC_FAMILY_IMX)
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CLOCK_EnableClock(kCLOCK_Mrt0);
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#endif
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}
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#endif /* defined(CONFIG_COUNTER_NXP_MRT) */
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return 0;
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}
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@ -145,6 +152,9 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(
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break;
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#endif
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#if defined(CONFIG_COUNTER_NXP_MRT)
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case MCUX_MRT_CLK:
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#endif
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#if defined(CONFIG_PWM_MCUX_SCTIMER)
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case MCUX_SCTIMER_CLK:
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#endif
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@ -51,4 +51,6 @@
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#define MCUX_SCTIMER_CLK 34
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#define MCUX_MRT_CLK 40
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#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_MCUX_LPC_SYSCON_H_ */
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