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soc: enables flash on LPC55xxx SoCs

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Enables IAP Flash Controller device on LPC55xxx SoCs.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
This commit is contained in:
Andrei Gansari 2019-11-12 14:36:38 +02:00 committed by Maureen Helm
parent 5ac450ecc4
commit c9301ad8a3
3 changed files with 10 additions and 0 deletions
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7
soc/arm/nxp_lpc/lpc55xxx/Kconfig.defconfig.lpc55S69_cpu0
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@ -29,4 +29,11 @@ config UART_MCUX_FLEXCOMM
endif # SERIAL endif # SERIAL
if FLASH
config SOC_FLASH_MCUX
default y
endif # FLASH
endif # SOC_LPC55S69_CPU0 endif # SOC_LPC55S69_CPU0

1
soc/arm/nxp_lpc/lpc55xxx/Kconfig.soc
View file

@ -15,6 +15,7 @@ config SOC_LPC55S69_CPU0
select CPU_HAS_FPU select CPU_HAS_FPU
select ARMV8_M_DSP select ARMV8_M_DSP
select ARM_SECURE_FIRMWARE select ARM_SECURE_FIRMWARE
select HAS_MCUX_IAP
config SOC_LPC55S69_CPU1 config SOC_LPC55S69_CPU1
bool "SOC_LPC55S69 M33 [CPU 1]" bool "SOC_LPC55S69 M33 [CPU 1]"

2
soc/arm/nxp_lpc/lpc55xxx/dts_fixup.h
View file

@ -8,4 +8,6 @@
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define DT_NUM_IRQ_PRIO_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define DT_FLASH_DEV_NAME DT_INST_0_NXP_LPC_IAP_LABEL
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */