From ce1add260bebe6690e809a62922a3ddb0cfffff5 Mon Sep 17 00:00:00 2001 From: Savinay Dharmappa Date: Thu, 22 Jun 2017 22:38:04 +0530 Subject: [PATCH] dts: x86: Add dts support for x86 patch adds necessary files and does the modification to the existing files to add device support for x86 based intel quark microcontroller Signed-off-by: Savinay Dharmappa --- arch/x86/core/Kconfig | 4 ++ .../quark_se/Kconfig.defconfig.series | 6 ++ arch/x86/soc/intel_quark/quark_se/linker.ld | 1 + dts/x86/Makefile | 4 ++ dts/x86/intel_curie.dtsi | 61 +++++++++++++++++++ dts/x86/mem.h | 13 ++++ include/arch/x86/arch.h | 1 + 7 files changed, 90 insertions(+) create mode 100644 dts/x86/Makefile create mode 100644 dts/x86/intel_curie.dtsi create mode 100644 dts/x86/mem.h diff --git a/arch/x86/core/Kconfig b/arch/x86/core/Kconfig index a617881010..6bd87e8e58 100644 --- a/arch/x86/core/Kconfig +++ b/arch/x86/core/Kconfig @@ -50,17 +50,21 @@ config MAX_IRQ_LINES to program to the PIC the association between vectors and interrupts. +if !HAS_DTS config PHYS_LOAD_ADDR hex "Physical load address" # Default value must be supplied by platform help This option specifies the physical address where the kernel is loaded. +endif +if !HAS_DTS config PHYS_RAM_ADDR hex "Physical RAM address" # Default value must be supplied by platform help This option specifies the physical RAM address of the selected SoC. +endif config RAM_SIZE int "Amount of RAM given to the kernel (in kB)" diff --git a/arch/x86/soc/intel_quark/quark_se/Kconfig.defconfig.series b/arch/x86/soc/intel_quark/quark_se/Kconfig.defconfig.series index e8f57fdc45..3ad8bf186b 100644 --- a/arch/x86/soc/intel_quark/quark_se/Kconfig.defconfig.series +++ b/arch/x86/soc/intel_quark/quark_se/Kconfig.defconfig.series @@ -16,11 +16,15 @@ config TOOLCHAIN_VARIANT default "iamcu" if X86_IAMCU default "" if !X86_IAMCU +if !HAS_DTS config PHYS_RAM_ADDR default 0xA8006400 +endif +if !HAS_DTS config PHYS_LOAD_ADDR default 0x40030000 if XIP +endif config RAM_SIZE default 55 @@ -200,8 +204,10 @@ config BLUETOOTH_UART_ON_DEV_NAME config UART_QMSI_0 def_bool y +if !HAS_DTS config UART_QMSI_0_BAUDRATE default 1000000 +endif config UART_QMSI_0_HW_FC def_bool y diff --git a/arch/x86/soc/intel_quark/quark_se/linker.ld b/arch/x86/soc/intel_quark/quark_se/linker.ld index 547837a429..dd8f750e34 100644 --- a/arch/x86/soc/intel_quark/quark_se/linker.ld +++ b/arch/x86/soc/intel_quark/quark_se/linker.ld @@ -13,6 +13,7 @@ #include +#include /* physical address of RAM (needed for correct __ram_phys_end symbol) */ #define PHYS_RAM_ADDR CONFIG_PHYS_RAM_ADDR diff --git a/dts/x86/Makefile b/dts/x86/Makefile new file mode 100644 index 0000000000..b5e071ad23 --- /dev/null +++ b/dts/x86/Makefile @@ -0,0 +1,4 @@ +ifeq ($(CONFIG_HAS_DTS),y) +dtb-$(CONFIG_SOC_QUARK_SE_C1000) = arduino_101.dts_compiled +always := $(dtb-y) +endif diff --git a/dts/x86/intel_curie.dtsi b/dts/x86/intel_curie.dtsi new file mode 100644 index 0000000000..69abc9b4aa --- /dev/null +++ b/dts/x86/intel_curie.dtsi @@ -0,0 +1,61 @@ +#include "skeleton.dtsi" +#include "mem.h" + +/ { + cpus { + cpu@0 { + compatible = "intel,quark"; + }; + + cpu@1 { + compatible = "arc"; + }; + }; + + flash0: flash@40010000 { + reg = <0x40010000 DT_FLASH_SIZE>; + }; + + + sram0: memory@a8006400 { + reg = <0xa8006400 DT_SRAM_SIZE>; + }; + + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + + rtc: rtc@b0000400 { + compatible = "intel,qmsi-rtc"; + reg = <0xb0000400 0x400>; + clock-frequency = <32768>; + }; + + uart0: uart@b0002000 { + compatible = "intel,qmsi-uart"; + reg = <0xb0002000 0x400>; + label = "UART_0"; + + status = "disabled"; + }; + + uart1: uart@b0002400 { + compatible = "intel,qmsi-uart"; + reg = <0xb0002400 0x400>; + label = "UART_1"; + + status = "disabled"; + }; + + gpio: gpio@b000c000 { + compatible = "intel,qmsi-gpio"; + reg = <0xb00c00 0x400>; + + gpio-controller; + #gpio-cells = <2>; + }; + }; +}; diff --git a/dts/x86/mem.h b/dts/x86/mem.h new file mode 100644 index 0000000000..87272503c9 --- /dev/null +++ b/dts/x86/mem.h @@ -0,0 +1,13 @@ +#ifndef __DT_BINDING_ST_MEM_H +#define __DT_BINDING_ST_MEM_H + +#define __SIZE_K(x) (x * 1024) + +#if defined(CONFIG_SOC_QUARK_SE_C1000) +#define DT_FLASH_SIZE __SIZE_K(144) +#define DT_SRAM_SIZE __SIZE_K(55) +#else +#error "Flash and RAM sizes not defined for this chip" +#endif + +#endif /* __DT_BINDING_ST_MEM_H */ diff --git a/include/arch/x86/arch.h b/include/arch/x86/arch.h index c088bd6966..a638f4ac96 100644 --- a/include/arch/x86/arch.h +++ b/include/arch/x86/arch.h @@ -17,6 +17,7 @@ #include #include #include +#include #ifndef _ASMLANGUAGE #include