drivers: counter: Add support for rpi_pico timer
Adds support for rpi_pico timer Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
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8d98e7064e
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cf242016b4
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@ -47,3 +47,4 @@ zephyr_library_sources_ifdef(CONFIG_COUNTER_NXP_S32_SYS_TIMER counter_nxp_s32_
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zephyr_library_sources_ifdef(CONFIG_COUNTER_TIMER_GD32 counter_gd32_timer.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_SNPS_DW counter_dw_timer.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_SHELL counter_timer_shell.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_TIMER_RPI_PICO counter_rpi_pico_timer.c)
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@ -92,4 +92,6 @@ source "drivers/counter/Kconfig.gd32"
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source "drivers/counter/Kconfig.dw"
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source "drivers/counter/Kconfig.rpi_pico"
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endif # COUNTER
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drivers/counter/Kconfig.rpi_pico
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drivers/counter/Kconfig.rpi_pico
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@ -0,0 +1,8 @@
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# Copyright (c) 2023 TOKITA Hiroshi
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# SPDX-License-Identifier: Apache-2.0
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config COUNTER_TIMER_RPI_PICO
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def_bool y
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select PICOSDK_USE_TIMER
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select PICOSDK_USE_CLAIM
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depends on DT_HAS_RASPBERRYPI_PICO_TIMER_ENABLED
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drivers/counter/counter_rpi_pico_timer.c
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drivers/counter/counter_rpi_pico_timer.c
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/*
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* Copyright (c) 2023 TOKITA Hiroshi
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <hardware/timer.h>
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#include <zephyr/drivers/counter.h>
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#include <zephyr/sys/atomic.h>
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#include <zephyr/irq.h>
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#include <cmsis_core.h>
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#define LOG_LEVEL CONFIG_COUNTER_LOG_LEVEL
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(counter_rpi_pico_timer, LOG_LEVEL);
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#define DT_DRV_COMPAT raspberrypi_pico_timer
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struct counter_rpi_pico_timer_ch_data {
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counter_alarm_callback_t callback;
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void *user_data;
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};
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struct counter_rpi_pico_timer_data {
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struct counter_rpi_pico_timer_ch_data *ch_data;
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uint32_t guard_period;
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};
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struct counter_rpi_pico_timer_config {
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struct counter_config_info info;
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timer_hw_t *timer;
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void (*irq_config)();
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};
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static int counter_rpi_pico_timer_start(const struct device *dev)
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{
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const struct counter_rpi_pico_timer_config *config = dev->config;
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config->timer->pause = 0;
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return 0;
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}
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static int counter_rpi_pico_timer_stop(const struct device *dev)
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{
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const struct counter_rpi_pico_timer_config *config = dev->config;
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config->timer->pause = 1u;
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config->timer->timelw = 0;
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config->timer->timehw = 0;
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return 0;
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}
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static uint32_t counter_rpi_pico_timer_get_top_value(const struct device *dev)
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{
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const struct counter_rpi_pico_timer_config *config = dev->config;
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return config->info.max_top_value;
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}
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static int counter_rpi_pico_timer_get_value(const struct device *dev, uint32_t *ticks)
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{
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*ticks = time_us_32();
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return 0;
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}
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static int counter_rpi_pico_timer_set_alarm(const struct device *dev, uint8_t id,
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const struct counter_alarm_cfg *alarm_cfg)
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{
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const struct counter_rpi_pico_timer_config *config = dev->config;
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struct counter_rpi_pico_timer_data *data = dev->data;
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struct counter_rpi_pico_timer_ch_data *chdata = &data->ch_data[id];
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uint64_t target = (alarm_cfg->flags & COUNTER_ALARM_CFG_ABSOLUTE) ? 0 : alarm_cfg->ticks;
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absolute_time_t alarm_at;
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bool missed;
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update_us_since_boot(&alarm_at, config->timer->timerawl + target);
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if (alarm_cfg->ticks > counter_rpi_pico_timer_get_top_value(dev)) {
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return -EINVAL;
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}
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if (chdata->callback) {
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return -EBUSY;
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}
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chdata->callback = alarm_cfg->callback;
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chdata->user_data = alarm_cfg->user_data;
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missed = hardware_alarm_set_target(id, alarm_at);
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if (missed) {
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if (alarm_cfg->flags & COUNTER_ALARM_CFG_EXPIRE_WHEN_LATE) {
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hardware_alarm_force_irq(id);
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}
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chdata->callback = NULL;
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chdata->user_data = NULL;
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return -ETIME;
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}
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return 0;
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}
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static int counter_rpi_pico_timer_cancel_alarm(const struct device *dev, uint8_t id)
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{
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hardware_alarm_cancel(id);
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return 0;
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}
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static int counter_rpi_pico_timer_set_top_value(const struct device *dev,
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const struct counter_top_cfg *cfg)
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{
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ARG_UNUSED(dev);
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ARG_UNUSED(cfg);
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return -ENOTSUP;
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}
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static uint32_t counter_rpi_pico_timer_get_pending_int(const struct device *dev)
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{
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return 0;
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}
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static uint32_t counter_rpi_pico_timer_get_guard_period(const struct device *dev, uint32_t flags)
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{
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struct counter_rpi_pico_timer_data *data = dev->data;
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return data->guard_period;
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}
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static int counter_rpi_pico_timer_set_guard_period(const struct device *dev, uint32_t guard,
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uint32_t flags)
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{
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struct counter_rpi_pico_timer_data *data = dev->data;
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__ASSERT_NO_MSG(guard < counter_rpi_pico_timer_get_top_value(dev));
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data->guard_period = guard;
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return 0;
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}
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static void counter_rpi_pico_irq_handle(uint32_t ch, void *arg)
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{
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struct device *dev = arg;
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struct counter_rpi_pico_timer_data *data = dev->data;
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counter_alarm_callback_t cb = data->ch_data[ch].callback;
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void *user_data = data->ch_data[ch].user_data;
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if (cb) {
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data->ch_data[ch].callback = NULL;
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data->ch_data[ch].user_data = NULL;
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cb(dev, ch, time_us_32(), user_data);
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}
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}
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static int counter_rpi_pico_timer_init(const struct device *dev)
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{
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const struct counter_rpi_pico_timer_config *config = dev->config;
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config->irq_config();
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return 0;
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}
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static const struct counter_driver_api counter_rpi_pico_driver_api = {
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.start = counter_rpi_pico_timer_start,
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.stop = counter_rpi_pico_timer_stop,
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.get_value = counter_rpi_pico_timer_get_value,
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.set_alarm = counter_rpi_pico_timer_set_alarm,
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.cancel_alarm = counter_rpi_pico_timer_cancel_alarm,
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.set_top_value = counter_rpi_pico_timer_set_top_value,
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.get_pending_int = counter_rpi_pico_timer_get_pending_int,
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.get_top_value = counter_rpi_pico_timer_get_top_value,
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.get_guard_period = counter_rpi_pico_timer_get_guard_period,
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.set_guard_period = counter_rpi_pico_timer_set_guard_period,
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};
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#define RPI_PICO_TIMER_IRQ_ENABLE(node_id, name, idx) \
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do { \
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hardware_alarm_set_callback(idx, counter_rpi_pico_irq_handle); \
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IRQ_CONNECT((DT_IRQ_BY_IDX(node_id, idx, irq)), \
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(DT_IRQ_BY_IDX(node_id, idx, priority)), hardware_alarm_irq_handler, \
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(DEVICE_DT_GET(node_id)), 0); \
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irq_enable((DT_IRQ_BY_IDX(node_id, idx, irq))); \
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} while (false);
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#define COUNTER_RPI_PICO_TIMER(inst) \
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static void counter_irq_config##inst(void) \
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{ \
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DT_INST_FOREACH_PROP_ELEM(inst, interrupt_names, RPI_PICO_TIMER_IRQ_ENABLE); \
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} \
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static struct counter_rpi_pico_timer_ch_data \
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ch_data##inst[DT_NUM_IRQS(DT_DRV_INST(inst))]; \
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static struct counter_rpi_pico_timer_data counter_##inst##_data = { \
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.ch_data = ch_data##inst, \
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}; \
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static const struct counter_rpi_pico_timer_config counter_##inst##_config = { \
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.timer = (timer_hw_t *)DT_INST_REG_ADDR(inst), \
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.irq_config = counter_irq_config##inst, \
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.info = \
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{ \
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.max_top_value = UINT32_MAX, \
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.freq = 1000000, \
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.flags = COUNTER_CONFIG_INFO_COUNT_UP, \
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.channels = ARRAY_SIZE(ch_data##inst), \
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}, \
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}; \
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DEVICE_DT_INST_DEFINE(inst, counter_rpi_pico_timer_init, NULL, &counter_##inst##_data, \
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&counter_##inst##_config, PRE_KERNEL_1, \
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CONFIG_COUNTER_INIT_PRIORITY, &counter_rpi_pico_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(COUNTER_RPI_PICO_TIMER)
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@ -189,6 +189,22 @@
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#pwm-cells = <3>;
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};
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timer: timer@40054000 {
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compatible = "raspberrypi,pico-timer";
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reg = <0x40054000 DT_SIZE_K(4)>;
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resets = <&reset RPI_PICO_RESETS_RESET_TIMER>;
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clocks = <&xtal_clk>;
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interrupts = <0 RPI_PICO_DEFAULT_IRQ_PRIORITY>,
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<1 RPI_PICO_DEFAULT_IRQ_PRIORITY>,
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<2 RPI_PICO_DEFAULT_IRQ_PRIORITY>,
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<3 RPI_PICO_DEFAULT_IRQ_PRIORITY>;
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interrupt-names = "TIMER_IRQ_0",
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"TIMER_IRQ_1",
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"TIMER_IRQ_2",
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"TIMER_IRQ_3";
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status = "disabled";
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};
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dma: dma@50000000 {
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compatible = "raspberrypi,pico-dma";
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reg = <0x50000000 DT_SIZE_K(64)>;
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8
dts/bindings/timer/raspberrypi,pico-timer.yaml
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8
dts/bindings/timer/raspberrypi,pico-timer.yaml
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# Copyright (c) 2023 TOKITA Hiroshi
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# SPDX-License-Identifier: Apache-2.0
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description: RaspberryPi Pico timer
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compatible: "raspberrypi,pico-timer"
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include: [base.yaml, reset-device.yaml]
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