spi: can use a tx threshold of 50%
The TX fifo threshold is pretty arbitrary. Set this too big and too many interrupts will occur for no good reason. Set it too small, and latency in the SPI transactions is introduced. User's will probably have to tune this per their application and SPI frequency, etc. I think setting this to 50% is a good guess for now. Change-Id: Ib325d40bc7ee10473d99443b3b3cd00fd6e4b95f Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
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@ -176,7 +176,7 @@ struct spi_dw_data {
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/* Threshold defaults */
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#define DW_SPI_FIFO_DEPTH CONFIG_SPI_DW_FIFO_DEPTH
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#define DW_SPI_TXFTLR_DFLT ((DW_SPI_FIFO_DEPTH*5)/8)
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#define DW_SPI_TXFTLR_DFLT ((DW_SPI_FIFO_DEPTH*1)/2) /* 50% */
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#define DW_SPI_RXFTLR_DFLT ((DW_SPI_FIFO_DEPTH*5)/8)
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/* Interrupt mask (IMR) */
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