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dts: arm: ti: Add dtsi for AM64x M4

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This file is basically a copy of the AM62x M4 dtsi but an
additional mcu_uart1 interface.

The internal clock frequency feeded into the UART IP is
96 MHz instead of 48 MHz, which is different to the AM62x.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
This commit is contained in:
Daniel Schultz 2024-04-01 13:59:00 -07:00 committed by Anas Nashif
parent 59de472dab
commit d30cbe999a
1 changed files with 86 additions and 0 deletions
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dts/arm/ti/am64x_m4.dtsi Normal file
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/*
* Copyright (c) 2024 PHYTEC Messtechnik GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <mem.h>
#include <freq.h>
#include <arm/armv7-m.dtsi>
#include <zephyr/dt-bindings/pinctrl/ti-k3-pinctrl.h>
#include <zephyr/dt-bindings/gpio/gpio.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m4f";
reg = <0>;
};
};
sram0: memory@0 {
compatible = "mmio-sram";
reg = <0x0 DT_SIZE_K(192)>; /* 192 KB of SRAM (I-Code) */
};
sram1: memory1@40000 {
compatible = "mmio-sram";
reg = <0x40000 DT_SIZE_K(64)>; /* 64 KB of SRAM (D-Code) */
};
sysclk: system-clock {
compatible = "fixed-clock";
clock-frequency = <DT_FREQ_M(400)>;
#clock-cells = <0>;
};
pinctrl: pinctrl@4084000 {
compatible = "ti,k3-pinctrl";
reg = <0x04084000 0x88>;
status = "okay";
};
uart0: serial@4a00000 {
compatible = "ns16550";
reg = <0x04a00000 0x200>;
interrupts = <24 4>;
interrupt-parent = <&nvic>;
clock-frequency = <DT_FREQ_M(96)>;
current-speed = <115200>;
reg-shift = <2>;
status = "disabled";
};
uart1: serial@4a10000 {
compatible = "ns16550";
reg = <0x04a10000 0x200>;
interrupts = <25 4>;
interrupt-parent = <&nvic>;
clock-frequency = <DT_FREQ_M(96)>;
current-speed = <115200>;
reg-shift = <2>;
status = "disabled";
};
gpio0: gpio@4201010 {
compatible = "ti,davinci-gpio";
reg = <0x4201010 0x100>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <24>;
status = "disabled";
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};
&systick {
status = "okay";
};