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drivers/spi: stm32: Modify use of "st,stm32-spi-fifo" compatible

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On stm32 spi devices, there are 2 main IP variants, with and w/o
fifo. Fifo is not really used today, but still there is some
additional code handling fifo. Today this code is protected under
Kconfig symbol SPI_STM32_HAS_FIFO.
This code carries redundant information vs dedicated compatible
"st,stm32-spi-fifo", which is provided as unique driver compatible
for devices supporting this IP as opposed to use of "st,stm32-spi"
when fifo is not supported.

Having these 2 compatibles defined exclusively is not convenient for
migration to DT_INST as DT_INST macros contain compatible string and
hence it cannot be used to provide common compatible code for devices
defining different compatibles.

Based on these observations, review stm32 spi devices compatible
declarations. Devices supporting fifo will now declare both
compatibles, as proposed by dt spec: "[compatible] property value
consists of a concatenated list of null terminated strings,
from most specific to most general". Hence field will now be:
"st,stm32-spi-fifo", "st,stm32-spi"

This way, fifo enabled stm32 spi devices will generate both:
DT_INST_STM32_SPI_FOO and DT_INST_STM32_SPI_FIFO_FOO
As well as:
DT_COMPAT_ST_STM32_SPI and DT_COMPAT_ST_STM32_SPI_FIFO
So, DT_INST_STM32_SPI_FOO could be used for device initialization.
Also DT_COMPAT_ST_STM32_SPI_FIFO could be used for FIFO handling
code inside driver. Hence use it to replace Kconfig symbol
SPI_STM32_HAS_FIFO.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2020-03-09 10:43:41 +01:00 committed by Kumar Gala
parent ac516aa888
commit d3664b063e
21 changed files with 34 additions and 41 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
drivers/spi/Kconfig.stm32
View file

@ -12,13 +12,6 @@ menuconfig SPI_STM32
if SPI_STM32
config SPI_STM32_HAS_FIFO
bool
depends on (SOC_SERIES_STM32L4X || SOC_SERIES_STM32F0X || \
SOC_SERIES_STM32F3X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32MP1X || \
SOC_SERIES_STM32WBX || SOC_SERIES_STM32G4X)
default y
config SPI_STM32_INTERRUPT
bool "STM32 MCU SPI Interrupt Support"
help

6
drivers/spi/spi_ll_stm32.c
View file

@ -195,7 +195,7 @@ static void spi_stm32_complete(struct spi_stm32_data *data, SPI_TypeDef *spi,
spi_context_cs_control(&data->ctx, false);
#if defined(CONFIG_SPI_STM32_HAS_FIFO)
#if defined(DT_COMPAT_ST_STM32_SPI_FIFO)
/* Flush RX buffer */
while (ll_func_rx_is_not_empty(spi)) {
(void) LL_SPI_ReceiveData8(spi);
@ -342,7 +342,7 @@ static int spi_stm32_configure(struct device *dev,
LL_SPI_SetDataWidth(spi, LL_SPI_DATAWIDTH_16BIT);
}
#if defined(CONFIG_SPI_STM32_HAS_FIFO)
#if defined(DT_COMPAT_ST_STM32_SPI_FIFO)
ll_func_set_fifo_threshold_8bit(spi);
#endif
@ -407,7 +407,7 @@ static int transceive(struct device *dev,
/* Set buffers info */
spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 1);
#if defined(CONFIG_SPI_STM32_HAS_FIFO)
#if defined(DT_COMPAT_ST_STM32_SPI_FIFO)
/* Flush RX buffer */
while (ll_func_rx_is_not_empty(spi)) {
(void) LL_SPI_ReceiveData8(spi);

2
drivers/spi/spi_ll_stm32.h
View file

@ -116,7 +116,7 @@ static inline u32_t ll_func_spi_is_busy(SPI_TypeDef *spi)
/* Header is compiled first, this switch avoid the compiler to lookup for
* non-existing LL FIFO functions for SoC without SPI FIFO
*/
#ifdef CONFIG_SPI_STM32_HAS_FIFO
#ifdef DT_COMPAT_ST_STM32_SPI_FIFO
static inline void ll_func_set_fifo_threshold_8bit(SPI_TypeDef *spi)
{
#ifdef CONFIG_SOC_SERIES_STM32MP1X

2
dts/arm/st/f0/stm32f0.dtsi
View file

@ -148,7 +148,7 @@
};
spi1: spi@40013000 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;

2
dts/arm/st/f0/stm32f030X8.dtsi
View file

@ -19,7 +19,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;

2
dts/arm/st/f0/stm32f030Xc.dtsi
View file

@ -10,7 +10,7 @@
/ {
soc {
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;

2
dts/arm/st/f0/stm32f070.dtsi
View file

@ -15,7 +15,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;

2
dts/arm/st/f0/stm32f072.dtsi
View file

@ -43,7 +43,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;

2
dts/arm/st/f0/stm32f091.dtsi
View file

@ -31,7 +31,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;

2
dts/arm/st/f3/stm32f3.dtsi
View file

@ -161,7 +161,7 @@
};
spi1: spi@40013000 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;

4
dts/arm/st/f3/stm32f302.dtsi
View file

@ -40,7 +40,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
@ -51,7 +51,7 @@
};
spi3: spi@40003c00 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0X40003c00 0x400>;

2
dts/arm/st/f3/stm32f303.dtsi
View file

@ -27,7 +27,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;

4
dts/arm/st/f3/stm32f373.dtsi
View file

@ -33,7 +33,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
@ -44,7 +44,7 @@
};
spi3: spi@40003c00 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003c00 0x400>;

6
dts/arm/st/g4/stm32g4.dtsi
View file

@ -223,7 +223,7 @@
};
spi1: spi@40013000 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
@ -234,7 +234,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
@ -245,7 +245,7 @@
};
spi3: spi@40003c00 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003c00 0x400>;

2
dts/arm/st/l4/stm32l4.dtsi
View file

@ -166,7 +166,7 @@
};
spi1: spi@40013000 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;

2
dts/arm/st/l4/stm32l433.dtsi
View file

@ -42,7 +42,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;

4
dts/arm/st/l4/stm32l452.dtsi
View file

@ -68,7 +68,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
@ -79,7 +79,7 @@
};
spi3: spi@40003c00 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003c00 0x400>;

4
dts/arm/st/l4/stm32l471.dtsi
View file

@ -88,7 +88,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
@ -99,7 +99,7 @@
};
spi3: spi@40003c00 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003c00 0x400>;

4
dts/arm/st/l4/stm32l4r5.dtsi
View file

@ -111,7 +111,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
@ -122,7 +122,7 @@
};
spi3: spi@40003c00 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003c00 0x400>;

10
dts/arm/st/mp1/stm32mp157.dtsi
View file

@ -158,7 +158,7 @@
};
spi1: spi@44004000 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
reg = <0x44004000 0x400>;
#address-cells = <1>;
#size-cells = <0>;
@ -168,7 +168,7 @@
};
spi2: spi@4400b000 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
reg = <0x4400b000 0x400>;
#address-cells = <1>;
#size-cells = <0>;
@ -178,7 +178,7 @@
};
spi3: spi@4400c000 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
reg = <0x4400c000 0x400>;
#address-cells = <1>;
#size-cells = <0>;
@ -188,7 +188,7 @@
};
spi4: spi@44005000 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
reg = <0x44005000 0x400>;
#address-cells = <1>;
#size-cells = <0>;
@ -198,7 +198,7 @@
};
spi5: spi@44009000 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
reg = <0x44009000 0x400>;
#address-cells = <1>;
#size-cells = <0>;

4
dts/arm/st/wb/stm32wb.dtsi
View file

@ -168,7 +168,7 @@
};
spi1: spi@40013000 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
@ -179,7 +179,7 @@
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo";
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;