cache: Rework headers and force inlining

The current headers do not allow the full inlining of the cache
functions. Rework and cleanup the headers to allow for the full
inlining.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>

include/zephyr/arch/cache.h

@@ -0,0 +1,290 @@
+/*
+ * Copyright (c) 2023 Carlo Caione <ccaione@baylibre.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * Public APIs for architectural cache controller drivers
+ */
+
+#ifndef ZEPHYR_INCLUDE_ARCH_CACHE_H_
+#define ZEPHYR_INCLUDE_ARCH_CACHE_H_
+
+/**
+ * @brief Cache Controller Interface
+ * @defgroup cache_arch_interface Cache Controller Interface
+ * @ingroup io_interfaces
+ * @{
+ */
+
+#if defined(CONFIG_DCACHE)
+
+/**
+ * @brief Enable the d-cache
+ *
+ * Enable the data cache.
+ */
+extern void arch_dcache_enable(void);
+
+#define cache_data_enable arch_dcache_enable
+
+/**
+ * @brief Disable the d-cache
+ *
+ * Disable the data cache.
+ */
+extern void arch_dcache_disable(void);
+
+#define cache_data_disable arch_dcache_disable
+
+/**
+ * @brief Flush the d-cache
+ *
+ * Flush the whole data cache.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+extern int arch_dcache_flush_all(void);
+
+#define cache_data_flush_all arch_dcache_flush_all
+
+/**
+ * @brief Invalidate the d-cache
+ *
+ * Invalidate the whole data cache.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+extern int arch_dcache_invd_all(void);
+
+#define cache_data_invd_all arch_dcache_invd_all
+
+/**
+ * @brief Flush and Invalidate the d-cache
+ *
+ * Flush and Invalidate the whole data cache.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+extern int arch_dcache_flush_and_invd_all(void);
+
+#define cache_data_flush_and_invd_all arch_dcache_flush_and_invd_all
+
+/**
+ * @brief Flush an address range in the d-cache
+ *
+ * Flush the specified address range of the data cache.
+ *
+ * @param addr Starting address to flush.
+ * @param size Range size.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+extern int arch_dcache_flush_range(void *addr, size_t size);
+
+#define cache_data_flush_range(addr, size) arch_dcache_flush_range(addr, size)
+
+/**
+ * @brief Invalidate an address range in the d-cache
+ *
+ * Invalidate the specified address range of the data cache.
+ *
+ * @param addr Starting address to invalidate.
+ * @param size Range size.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+extern int arch_dcache_invd_range(void *addr, size_t size);
+
+#define cache_data_invd_range(addr, size) arch_dcache_invd_range(addr, size)
+
+/**
+ * @brief Flush and Invalidate an address range in the d-cache
+ *
+ * Flush and Invalidate the specified address range of the data cache.
+ *
+ * @param addr Starting address to flush and invalidate.
+ * @param size Range size.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+
+extern int arch_dcache_flush_and_invd_range(void *addr, size_t size);
+
+#define cache_data_flush_and_invd_range(addr, size) \
+	arch_dcache_flush_and_invd_range(addr, size)
+
+#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
+
+/**
+ *
+ * @brief Get the d-cache line size.
+ *
+ * The API is provided to dynamically detect the data cache line size at run
+ * time.
+ *
+ * The function must be implemented only when CONFIG_DCACHE_LINE_SIZE_DETECT is
+ * defined.
+ *
+ * @retval size Size of the d-cache line.
+ * @retval 0 If the d-cache is not enabled.
+ */
+extern size_t arch_dcache_line_size_get(void);
+
+#define cache_data_line_size_get arch_dcache_line_size_get
+
+#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
+
+#endif /* CONFIG_DCACHE */
+
+#if defined(CONFIG_ICACHE)
+
+/**
+ * @brief Enable the i-cache
+ *
+ * Enable the instruction cache.
+ */
+extern void arch_icache_enable(void);
+
+#define cache_instr_enable arch_icache_enable
+
+/**
+ * @brief Disable the i-cache
+ *
+ * Disable the instruction cache.
+ */
+extern void arch_icache_disable(void);
+
+#define cache_instr_disable arch_icache_disable
+
+/**
+ * @brief Flush the i-cache
+ *
+ * Flush the whole instruction cache.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+extern int arch_icache_flush_all(void);
+
+#define cache_instr_flush_all arch_icache_flush_all
+
+/**
+ * @brief Invalidate the i-cache
+ *
+ * Invalidate the whole instruction cache.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+extern int arch_icache_invd_all(void);
+
+#define cache_instr_invd_all arch_icache_invd_all
+
+/**
+ * @brief Flush and Invalidate the i-cache
+ *
+ * Flush and Invalidate the whole instruction cache.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+extern int arch_icache_flush_and_invd_all(void);
+
+#define cache_instr_flush_and_invd_all arch_icache_flush_and_invd_all
+
+/**
+ * @brief Flush an address range in the i-cache
+ *
+ * Flush the specified address range of the instruction cache.
+ *
+ * @param addr Starting address to flush.
+ * @param size Range size.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+extern int arch_icache_flush_range(void *addr, size_t size);
+
+#define cache_instr_flush_range(addr, size) arch_icache_flush_range(addr, size)
+
+/**
+ * @brief Invalidate an address range in the i-cache
+ *
+ * Invalidate the specified address range of the instruction cache.
+ *
+ * @param addr Starting address to invalidate.
+ * @param size Range size.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+extern int arch_icache_invd_range(void *addr, size_t size);
+
+#define cache_instr_invd_range(addr, size) arch_icache_invd_range(addr, size)
+
+/**
+ * @brief Flush and Invalidate an address range in the i-cache
+ *
+ * Flush and Invalidate the specified address range of the instruction cache.
+ *
+ * @param addr Starting address to flush and invalidate.
+ * @param size Range size.
+ *
+ * @retval 0 If succeeded.
+ * @retval -ENOTSUP If not supported.
+ * @retval -errno Negative errno for other failures.
+ */
+extern int arch_icache_flush_and_invd_range(void *addr, size_t size);
+
+#define cache_instr_flush_and_invd_range(addr, size) \
+	arch_icache_flush_and_invd_range(addr, size)
+
+#if defined(CONFIG_ICACHE_LINE_SIZE_DETECT)
+
+/**
+ *
+ * @brief Get the i-cache line size.
+ *
+ * The API is provided to dynamically detect the instruction cache line size at
+ * run time.
+ *
+ * The function must be implemented only when CONFIG_ICACHE_LINE_SIZE_DETECT is
+ * defined.
+ *
+ * @retval size Size of the d-cache line.
+ * @retval 0 If the d-cache is not enabled.
+ */
+
+extern size_t arch_icache_line_size_get(void);
+
+#define cache_instr_line_size_get arch_icache_line_size_get
+
+#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */
+
+#endif /* CONFIG_ICACHE */
+
+/**
+ * @}
+ */
+
+#endif /* ZEPHYR_INCLUDE_ARCH_CACHE_H_ */

include/zephyr/cache.h

@@ -21,98 +21,12 @@ extern "C" {
 #endif
 
 #if defined(CONFIG_EXTERNAL_CACHE)
+#include <zephyr/drivers/cache.h>
 
-/*
+#elif defined(CONFIG_ARCH_CACHE)
- * External cache API driver interface mirrored in
+#include <zephyr/arch/cache.h>
- * include/zephyr/drivers/cache.h
- */
-
-#if defined(CONFIG_DCACHE)
-
-extern void cache_data_enable(void);
-extern void cache_data_disable(void);
-
-extern int cache_data_flush_all(void);
-extern int cache_data_invd_all(void);
-extern int cache_data_flush_and_invd_all(void);
-
-extern int cache_data_flush_range(void *addr, size_t size);
-extern int cache_data_invd_range(void *addr, size_t size);
-extern int cache_data_flush_and_invd_range(void *addr, size_t size);
-
-#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
-extern size_t cache_data_line_size_get(void);
-#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
-
-#endif /* CONFIG_DCACHE */
-
-#if defined(CONFIG_ICACHE)
-
-extern void cache_instr_enable(void);
-extern void cache_instr_disable(void);
-
-extern int cache_instr_flush_all(void);
-extern int cache_instr_invd_all(void);
-extern int cache_instr_flush_and_invd_all(void);
-
-extern int cache_instr_flush_range(void *addr, size_t size);
-extern int cache_instr_invd_range(void *addr, size_t size);
-extern int cache_instr_flush_and_invd_range(void *addr, size_t size);
-
-#if defined(CONFIG_ICACHE_LINE_SIZE_DETECT)
-extern size_t cache_instr_line_size_get(void);
-#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */
-
-#endif /* CONFIG_ICACHE */
-
-#else /* CONFIG_ARCH_CACHE */
-
-/*
- * Arch cache API interface mirrored in
- * include/zephyr/sys/arch_interface.h
- */
-
-#if defined(CONFIG_DCACHE)
-
-#define cache_data_enable			arch_dcache_enable
-#define cache_data_disable			arch_dcache_disable
-
-#define cache_data_flush_all			arch_dcache_flush_all
-#define cache_data_invd_all			arch_dcache_invd_all
-#define cache_data_flush_and_invd_all		arch_dcache_flush_and_invd_all
-
-#define cache_data_flush_range(addr, size)	arch_dcache_flush_range(addr, size)
-#define cache_data_invd_range(addr, size)	arch_dcache_invd_range(addr, size)
-#define cache_data_flush_and_invd_range(addr, size)	\
-						arch_dcache_flush_and_invd_range(addr, size)
-
-#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
-#define cache_data_line_size_get		arch_dcache_line_size_get
-#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
-
-#endif /* CONFIG_DCACHE */
-
-#if defined(CONFIG_ICACHE)
-
-#define cache_instr_enable			arch_icache_enable
-#define cache_instr_disable			arch_icache_disable
-
-#define cache_instr_flush_all			arch_icache_flush_all
-#define cache_instr_invd_all			arch_icache_invd_all
-#define cache_instr_flush_and_invd_all		arch_icache_flush_and_invd_all
-
-#define cache_instr_flush_range(addr, size)	arch_icache_flush_range(addr, size)
-#define cache_instr_invd_range(addr, size)	arch_icache_invd_range(addr, size)
-#define cache_instr_flush_and_invd_range(addr, size)	\
-						arch_icache_flush_and_invd_range(addr, size)
-
-#if defined(CONFIG_ICACHE_LINE_SIZE_DETECT)
-#define cache_instr_line_size_get		arch_icache_line_size_get
-#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */
-
-#endif /* CONFIG_ICACHE */
-#endif /* CONFIG_EXTERNAL_CACHE */
 
+#endif
 
 /**
  * @defgroup cache_interface Cache Interface
@@ -134,7 +48,7 @@ extern size_t cache_instr_line_size_get(void);
  * Enable the data cache
  *
  */
-static inline void sys_cache_data_enable(void)
+static ALWAYS_INLINE void sys_cache_data_enable(void)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
 	cache_data_enable();
@@ -147,7 +61,7 @@ static inline void sys_cache_data_enable(void)
  * Disable the data cache
  *
  */
-static inline void sys_cache_data_disable(void)
+static ALWAYS_INLINE void sys_cache_data_disable(void)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
 	cache_data_disable();
@@ -160,7 +74,7 @@ static inline void sys_cache_data_disable(void)
  * Enable the instruction cache
  *
  */
-static inline void sys_cache_instr_enable(void)
+static ALWAYS_INLINE void sys_cache_instr_enable(void)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
 	cache_instr_enable();
@@ -173,7 +87,7 @@ static inline void sys_cache_instr_enable(void)
  * Disable the instruction cache
  *
  */
-static inline void sys_cache_instr_disable(void)
+static ALWAYS_INLINE void sys_cache_instr_disable(void)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
 	cache_instr_disable();
@@ -189,7 +103,7 @@ static inline void sys_cache_instr_disable(void)
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-static inline int sys_cache_data_flush_all(void)
+static ALWAYS_INLINE int sys_cache_data_flush_all(void)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
 	return cache_data_flush_all();
@@ -206,7 +120,7 @@ static inline int sys_cache_data_flush_all(void)
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-static inline int sys_cache_instr_flush_all(void)
+static ALWAYS_INLINE int sys_cache_instr_flush_all(void)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
 	return cache_instr_flush_all();
@@ -223,7 +137,7 @@ static inline int sys_cache_instr_flush_all(void)
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-static inline int sys_cache_data_invd_all(void)
+static ALWAYS_INLINE int sys_cache_data_invd_all(void)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
 	return cache_data_invd_all();
@@ -240,7 +154,7 @@ static inline int sys_cache_data_invd_all(void)
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-static inline int sys_cache_instr_invd_all(void)
+static ALWAYS_INLINE int sys_cache_instr_invd_all(void)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
 	return cache_instr_invd_all();
@@ -257,7 +171,7 @@ static inline int sys_cache_instr_invd_all(void)
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-static inline int sys_cache_data_flush_and_invd_all(void)
+static ALWAYS_INLINE int sys_cache_data_flush_and_invd_all(void)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
 	return cache_data_flush_and_invd_all();
@@ -274,7 +188,7 @@ static inline int sys_cache_data_flush_and_invd_all(void)
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-static inline int sys_cache_instr_flush_and_invd_all(void)
+static ALWAYS_INLINE int sys_cache_instr_flush_and_invd_all(void)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
 	return cache_instr_flush_and_invd_all();
@@ -294,8 +208,9 @@ static inline int sys_cache_instr_flush_and_invd_all(void)
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-__syscall int sys_cache_data_flush_range(void *addr, size_t size);
+__syscall_always_inline int sys_cache_data_flush_range(void *addr, size_t size);
-static inline int z_impl_sys_cache_data_flush_range(void *addr, size_t size)
+
+static ALWAYS_INLINE int z_impl_sys_cache_data_flush_range(void *addr, size_t size)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
 	return cache_data_flush_range(addr, size);
@@ -318,7 +233,7 @@ static inline int z_impl_sys_cache_data_flush_range(void *addr, size_t size)
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-static inline int sys_cache_instr_flush_range(void *addr, size_t size)
+static ALWAYS_INLINE int sys_cache_instr_flush_range(void *addr, size_t size)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
 	return cache_instr_flush_range(addr, size);
@@ -341,8 +256,9 @@ static inline int sys_cache_instr_flush_range(void *addr, size_t size)
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-__syscall int sys_cache_data_invd_range(void *addr, size_t size);
+__syscall_always_inline int sys_cache_data_invd_range(void *addr, size_t size);
-static inline int z_impl_sys_cache_data_invd_range(void *addr, size_t size)
+
+static ALWAYS_INLINE int z_impl_sys_cache_data_invd_range(void *addr, size_t size)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
 	return cache_data_invd_range(addr, size);
@@ -365,7 +281,7 @@ static inline int z_impl_sys_cache_data_invd_range(void *addr, size_t size)
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-static inline int sys_cache_instr_invd_range(void *addr, size_t size)
+static ALWAYS_INLINE int sys_cache_instr_invd_range(void *addr, size_t size)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
 	return cache_instr_invd_range(addr, size);
@@ -388,8 +304,9 @@ static inline int sys_cache_instr_invd_range(void *addr, size_t size)
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-__syscall int sys_cache_data_flush_and_invd_range(void *addr, size_t size);
+__syscall_always_inline int sys_cache_data_flush_and_invd_range(void *addr, size_t size);
-static inline int z_impl_sys_cache_data_flush_and_invd_range(void *addr, size_t size)
+
+static ALWAYS_INLINE int z_impl_sys_cache_data_flush_and_invd_range(void *addr, size_t size)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
 	return cache_data_flush_and_invd_range(addr, size);
@@ -412,7 +329,7 @@ static inline int z_impl_sys_cache_data_flush_and_invd_range(void *addr, size_t
  * @retval -ENOTSUP If not supported.
  * @retval -errno Negative errno for other failures.
  */
-static inline int sys_cache_instr_flush_and_invd_range(void *addr, size_t size)
+static ALWAYS_INLINE int sys_cache_instr_flush_and_invd_range(void *addr, size_t size)
 {
 #if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
 	return cache_instr_flush_and_invd_range(addr, size);
@@ -439,7 +356,7 @@ static inline int sys_cache_instr_flush_and_invd_range(void *addr, size_t size)
  * @retval size Size of the d-cache line.
  * @retval 0 If the d-cache is not enabled.
  */
-static inline size_t sys_cache_data_line_size_get(void)
+static ALWAYS_INLINE size_t sys_cache_data_line_size_get(void)
 {
 #ifdef CONFIG_DCACHE_LINE_SIZE_DETECT
 	return cache_data_line_size_get();
@@ -466,7 +383,7 @@ static inline size_t sys_cache_data_line_size_get(void)
  * @retval size Size of the d-cache line.
  * @retval 0 If the d-cache is not enabled.
  */
-static inline size_t sys_cache_instr_line_size_get(void)
+static ALWAYS_INLINE size_t sys_cache_instr_line_size_get(void)
 {
 #ifdef CONFIG_ICACHE_LINE_SIZE_DETECT
 	return cache_instr_line_size_get();
@@ -478,7 +395,7 @@ static inline size_t sys_cache_instr_line_size_get(void)
 }
 
 #ifdef CONFIG_LIBMETAL
-static inline void sys_cache_flush(void *addr, size_t size)
+static ALWAYS_INLINE void sys_cache_flush(void *addr, size_t size)
 {
 	sys_cache_data_flush_range(addr, size);
 }

include/zephyr/sys/arch_interface.h

@@ -1030,236 +1030,6 @@ int arch_gdb_remove_breakpoint(struct gdb_ctx *ctx, uint8_t type,
 #endif
 /** @} */
 
-/**
- * @defgroup arch_cache Architecture-specific cache functions
- * @ingroup arch-interface
- * @{
- */
-
-#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ARCH_CACHE)
-#if defined(CONFIG_DCACHE)
-
-/**
- * @brief Enable the d-cache
- *
- * Enable the data cache.
- */
-
-void arch_dcache_enable(void);
-
-/**
- * @brief Disable the d-cache
- *
- * Disable the data cache.
- */
-void arch_dcache_disable(void);
-
-/**
- * @brief Flush the d-cache
- *
- * Flush the whole data cache.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_dcache_flush_all(void);
-
-/**
- * @brief Invalidate the d-cache
- *
- * Invalidate the whole data cache.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_dcache_invd_all(void);
-
-/**
- * @brief Flush and Invalidate the d-cache
- *
- * Flush and Invalidate the whole data cache.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_dcache_flush_and_invd_all(void);
-
-/**
- * @brief Flush an address range in the d-cache
- *
- * Flush the specified address range of the data cache.
- *
- * @param addr Starting address to flush.
- * @param size Range size.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_dcache_flush_range(void *addr, size_t size);
-
-/**
- * @brief Invalidate an address range in the d-cache
- *
- * Invalidate the specified address range of the data cache.
- *
- * @param addr Starting address to invalidate.
- * @param size Range size.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_dcache_invd_range(void *addr, size_t size);
-
-/**
- * @brief Flush and Invalidate an address range in the d-cache
- *
- * Flush and Invalidate the specified address range of the data cache.
- *
- * @param addr Starting address to flush and invalidate.
- * @param size Range size.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_dcache_flush_and_invd_range(void *addr, size_t size);
-
-#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
-/**
- *
- * @brief Get the the d-cache line size.
- *
- * The API is provided to dynamically detect the data cache line size at run
- * time.
- *
- * The function must be implemented only when CONFIG_DCACHE_LINE_SIZE_DETECT is
- * defined.
- *
- * @retval size Size of the d-cache line.
- * @retval 0 If the d-cache is not enabled.
- */
-size_t arch_dcache_line_size_get(void);
-#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
-
-#endif /* CONFIG_DCACHE */
-
-#if defined(CONFIG_ICACHE)
-/**
- * @brief Enable the i-cache
- *
- * Enable the instruction cache.
- */
-void arch_icache_enable(void);
-
-/**
- * @brief Disable the i-cache
- *
- * Disable the instruction cache.
- */
-void arch_icache_disable(void);
-
-/**
- * @brief Flush the i-cache
- *
- * Flush the whole instruction cache.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_icache_flush_all(void);
-
-/**
- * @brief Invalidate the i-cache
- *
- * Invalidate the whole instruction cache.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_icache_invd_all(void);
-
-/**
- * @brief Flush and Invalidate the i-cache
- *
- * Flush and Invalidate the whole instruction cache.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_icache_flush_and_invd_all(void);
-
-/**
- * @brief Flush an address range in the i-cache
- *
- * Flush the specified address range of the instruction cache.
- *
- * @param addr Starting address to flush.
- * @param size Range size.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_icache_flush_range(void *addr, size_t size);
-
-/**
- * @brief Invalidate an address range in the i-cache
- *
- * Invalidate the specified address range of the instruction cache.
- *
- * @param addr Starting address to invalidate.
- * @param size Range size.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_icache_invd_range(void *addr, size_t size);
-
-/**
- * @brief Flush and Invalidate an address range in the i-cache
- *
- * Flush and Invalidate the specified address range of the instruction cache.
- *
- * @param addr Starting address to flush and invalidate.
- * @param size Range size.
- *
- * @retval 0 If succeeded.
- * @retval -ENOTSUP If not supported.
- * @retval -errno Negative errno for other failures.
- */
-int arch_icache_flush_and_invd_range(void *addr, size_t size);
-
-#if defined(CONFIG_ICACHE_LINE_SIZE_DETECT)
-/**
- *
- * @brief Get the the i-cache line size.
- *
- * The API is provided to dynamically detect the instruction cache line size at
- * run time.
- *
- * The function must be implemented only when CONFIG_ICACHE_LINE_SIZE_DETECT is
- * defined.
- *
- * @retval size Size of the d-cache line.
- * @retval 0 If the d-cache is not enabled.
- */
-size_t arch_icache_line_size_get(void);
-#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */
-
-#endif /* CONFIG_ICACHE */
-#endif /* CONFIG_CACHE_MANAGEMENT && CONFIG_ARCH_CACHE */
-
-/** @} */
-
 #ifdef CONFIG_TIMING_FUNCTIONS
 #include <zephyr/timing/types.h>