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CODEOWNERS: adapt to new location of soc code

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soc code is now under ZEPHYR_BASE/soc

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2018-09-03 18:26:54 -05:00
parent 563c161a80
commit d7f7324d60
1 changed files with 16 additions and 11 deletions
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25
CODEOWNERS
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@ -6,23 +6,28 @@
.known-issues/ @inakypg @nashif
arch/arc/ @vonhust @ruuddw
arch/arm/ @MaureenHelm @galak
arch/arm/soc/arm/mps2/ @fvincenzo
arch/arm/soc/atmel_sam/sam4s @fallrisk
arch/arm/soc/nxp*/ @MaureenHelm
arch/arm/soc/st_stm32/ @erwango
arch/arm/soc/st_stm32/stm32f4/ @rsalveti @idlethread
arch/arm/soc/ti_simplelink/cc32xx @GAnthony
arch/arm/soc/ti_simplelink/msp432p4xx @Mani-Sadhasivam
soc/arm/ @MaureenHelm @galak
soc/arm/arm/mps2/ @fvincenzo
soc/arm/atmel_sam/sam4s @fallrisk
soc/arm/nxp*/ @MaureenHelm
soc/arm/st_stm32/ @erwango
soc/arm/st_stm32/stm32f4/ @rsalveti @idlethread
soc/arm/ti_simplelink/cc32xx @GAnthony
soc/arm/ti_simplelink/msp432p4xx @Mani-Sadhasivam
arch/nios2/ @andrewboie @ramakrishnapallala
arch/posix/ @aescolar
arch/riscv32/ @fractalclone @kgugala @pgielda
soc/posix/ @aescolar
soc/riscv32/ @fractalclone @kgugala @pgielda
arch/x86/ @andrewboie @ramakrishnapallala
arch/x86/core/ @andrewboie
arch/x86/core/crt0.S @ramakrishnapallala @nashif
arch/x86/soc/intel_quark/quark_d2000/ @nashif
arch/x86/soc/intel_quark/quark_se/ @nashif
arch/x86/soc/intel_quark/quark_x1000/ @nashif
soc/x86/ @andrewboie @ramakrishnapallala
soc/x86/intel_quark/quark_d2000/ @nashif
soc/x86/intel_quark/quark_se/ @nashif
soc/x86/intel_quark/quark_x1000/ @nashif
arch/xtensa/ @andrewboie @rgundi @andyross
soc/xtensa/ @andrewboie @rgundi @andyross
boards/arc/ @vonhust @ruuddw
boards/arc/arduino_101_sss/ @nashif
boards/arc/em_starterkit/ @vonhust