patrick/zephyr
1
0
Fork 0
Code Issues Pull requests Actions 8 Packages Projects Releases Wiki Activity

boards: arm: RT1010_EVK: Set FlexSPI read address option bit

Browse source 
Set FlexSPI read address option bit (READADDROPT) in early boot for
FlexSPI on RT1010. This fixes an issue where the FlexSPI fetch would
return invalid data, resulting an a HardFault.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2022-11-07 17:28:34 -06:00 committed by David Leach
parent 1ed776a218
commit dcced505cb
2 changed files with 24 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
boards/arm/mimxrt1010_evk/CMakeLists.txt
View file

@ -4,9 +4,10 @@
# SPDX-License-Identifier: Apache-2.0
#
zephyr_library()
zephyr_library_sources(init.c)
if(CONFIG_NXP_IMX_RT_BOOT_HEADER)
zephyr_library()
if(NOT DEFINED CONFIG_BOARD_MIMXRT1010_EVK)
message(WARNING "It appears you are using the board definition for "
"the MIMXRT1010-EVK, but targeting a custom board. You may need to "

22
boards/arm/mimxrt1010_evk/init.c Normal file
View file

@ -0,0 +1,22 @@
/*
* Copyright 2022 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <soc.h>
void SystemInitHook(void)
{
#ifdef CONFIG_CODE_FLEXSPI
/* AT25SF128A SPI Flash on the RT1010-EVK requires special alignment
* considerations, so set the READADDROPT bit in the FlexSPI so it
* will fetch more data than each AHB burst requires to meet alignment
* requirements
*
* Without this, the FlexSPI will return corrupted data during early
* boot, causing a hardfault. This can also be resolved by enabling
* the instruction cache in very early boot.
*/
FLEXSPI->AHBCR |= FLEXSPI_AHBCR_READADDROPT_MASK;
#endif /* CONFIG_CODE_FLEXSPI */
}