arch: x86: add interface for encode irq flags
add interface for encode irq flags from acpica to arch specfic. Currently enabled only for x86 archiecture. Signed-off-by: Najumon B.A <najumon.ba@intel.com>
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@ -16,6 +16,7 @@ zephyr_library_sources_ifdef(CONFIG_REBOOT_RST_CNT reboot_rst_cnt.c)
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zephyr_library_sources_ifdef(CONFIG_MULTIBOOT_INFO multiboot.c)
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zephyr_library_sources_ifdef(CONFIG_X86_EFI efi.c)
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zephyr_library_sources_ifdef(CONFIG_ACPI legacy_bios.c)
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zephyr_library_sources_ifdef(CONFIG_ACPI x86_acpi.c)
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zephyr_library_sources_ifdef(CONFIG_X86_MMU x86_mmu.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.c)
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zephyr_library_sources_ifdef(CONFIG_ARCH_CACHE cache.c)
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arch/x86/core/x86_acpi.c
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arch/x86/core/x86_acpi.c
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@ -0,0 +1,26 @@
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/*
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* Copyright (c) 2023, Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/acpi/acpi.h>
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#include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
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uint32_t arch_acpi_encode_irq_flags(uint8_t polarity, uint8_t trigger)
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{
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uint32_t irq_flag = IRQ_DELIVERY_LOWEST;
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if (trigger == ACPI_LEVEL_SENSITIVE) {
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irq_flag |= IRQ_TYPE_LEVEL;
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} else {
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irq_flag |= IRQ_TYPE_EDGE;
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}
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if (polarity == ACPI_ACTIVE_HIGH) {
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irq_flag |= IRQ_TYPE_HIGH;
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} else if (polarity == ACPI_ACTIVE_LOW) {
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irq_flag |= IRQ_TYPE_LOW;
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}
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return irq_flag;
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}
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@ -10,6 +10,8 @@
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#ifndef _ASMLANGUAGE
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#include <zephyr/arch/x86/x86_acpi.h>
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#if defined(CONFIG_X86_64)
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#include <zephyr/arch/x86/intel64/thread.h>
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include/zephyr/arch/x86/x86_acpi.h
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include/zephyr/arch/x86/x86_acpi.h
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/*
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* Copyright (c) 2023, Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @brief Encode interrupt flag for x86 architecture.
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*
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* @param polarity the interrupt polarity received from ACPICA lib
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* @param trigger the interrupt level received from ACPICA lib
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* @return return encoded interrupt flag
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*/
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uint32_t arch_acpi_encode_irq_flags(uint8_t polarity, uint8_t trigger);
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