arch: x86: add interface for encode irq flags

add interface for encode irq flags from acpica to arch specfic.
Currently enabled only for x86 archiecture.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
This commit is contained in:
Najumon B.A 2023-09-15 15:25:47 +05:30 committed by Carles Cufí
parent 08c0b98eef
commit dd9e0df06b
4 changed files with 43 additions and 0 deletions

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@ -16,6 +16,7 @@ zephyr_library_sources_ifdef(CONFIG_REBOOT_RST_CNT reboot_rst_cnt.c)
zephyr_library_sources_ifdef(CONFIG_MULTIBOOT_INFO multiboot.c)
zephyr_library_sources_ifdef(CONFIG_X86_EFI efi.c)
zephyr_library_sources_ifdef(CONFIG_ACPI legacy_bios.c)
zephyr_library_sources_ifdef(CONFIG_ACPI x86_acpi.c)
zephyr_library_sources_ifdef(CONFIG_X86_MMU x86_mmu.c)
zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.c)
zephyr_library_sources_ifdef(CONFIG_ARCH_CACHE cache.c)

26
arch/x86/core/x86_acpi.c Normal file
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@ -0,0 +1,26 @@
/*
* Copyright (c) 2023, Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/acpi/acpi.h>
#include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
uint32_t arch_acpi_encode_irq_flags(uint8_t polarity, uint8_t trigger)
{
uint32_t irq_flag = IRQ_DELIVERY_LOWEST;
if (trigger == ACPI_LEVEL_SENSITIVE) {
irq_flag |= IRQ_TYPE_LEVEL;
} else {
irq_flag |= IRQ_TYPE_EDGE;
}
if (polarity == ACPI_ACTIVE_HIGH) {
irq_flag |= IRQ_TYPE_HIGH;
} else if (polarity == ACPI_ACTIVE_LOW) {
irq_flag |= IRQ_TYPE_LOW;
}
return irq_flag;
}

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@ -10,6 +10,8 @@
#ifndef _ASMLANGUAGE
#include <zephyr/arch/x86/x86_acpi.h>
#if defined(CONFIG_X86_64)
#include <zephyr/arch/x86/intel64/thread.h>

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@ -0,0 +1,14 @@
/*
* Copyright (c) 2023, Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief Encode interrupt flag for x86 architecture.
*
* @param polarity the interrupt polarity received from ACPICA lib
* @param trigger the interrupt level received from ACPICA lib
* @return return encoded interrupt flag
*/
uint32_t arch_acpi_encode_irq_flags(uint8_t polarity, uint8_t trigger);