arm: beetle: Use device tree for IRQs
Get the IRQs for the devices we define in the device tree from the dts file. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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@ -1,7 +1,6 @@
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/dts-v1/;
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#include <arm/armv7-m.dtsi>
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#include "arm/beetle/soc_irq.h"
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/ {
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compatible = "arm,beetle";
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@ -38,25 +37,25 @@
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timer0: timer@40000000 {
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compatible = "arm,cmsdk-timer";
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reg = <0x40000000 0x1000>;
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interrupts = <IRQ_TIMER0 3>;
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interrupts = <8 3>;
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};
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timer1: timer@40001000 {
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compatible = "arm,cmsdk-timer";
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reg = <0x40001000 0x1000>;
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interrupts = <IRQ_TIMER1 3>;
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interrupts = <9 3>;
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};
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dtimer0: dtimer@40002000 {
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compatible = "arm,cmsdk-dtimer";
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reg = <0x40000000 0x1000>;
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interrupts = <IRQ_DUALTIMER 3>;
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interrupts = <10 3>;
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};
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uart0: uart@40004000 {
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compatible = "arm,cmsdk-uart";
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reg = <0x40004000 0x1000>;
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interrupts = <IRQ_UART0 3>;
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interrupts = <0 3>;
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current-speed = <115200>;
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label = "UART_0";
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};
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@ -64,7 +63,7 @@
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uart1: uart@40005000 {
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compatible = "arm,cmsdk-uart";
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reg = <0x40005000 0x1000>;
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interrupts = <IRQ_UART1 3>;
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interrupts = <1 3>;
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current-speed = <115200>;
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label = "UART_1";
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};
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@ -77,25 +76,25 @@
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gpio0: gpio@40010000 {
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compatible = "arm,cmsdk-gpio";
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reg = <0x40010000 0x1000>;
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interrupts = <IRQ_PORT0_ALL 3>;
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interrupts = <6 3>;
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};
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gpio1: gpio@40011000 {
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compatible = "arm,cmsdk-gpio";
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reg = <0x40011000 0x1000>;
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interrupts = <IRQ_PORT1_ALL 3>;
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interrupts = <7 3>;
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};
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gpio2: gpio@40012000 {
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compatible = "arm,cmsdk-gpio";
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reg = <0x40012000 0x1000>;
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interrupts = <IRQ_PORT2_ALL 3>;
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interrupts = <42 3>;
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};
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gpio3: gpio@40013000 {
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compatible = "arm,cmsdk-gpio";
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reg = <0x40013000 0x1000>;
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interrupts = <IRQ_PORT3_ALL 3>;
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interrupts = <43 3>;
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};
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};
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};
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@ -31,11 +31,15 @@
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/* CMSDK AHB General Purpose Input/Output (GPIO) */
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#define CMSDK_AHB_GPIO0 ARM_CMSDK_GPIO_40010000_BASE_ADDRESS
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#define IRQ_PORT0_ALL ARM_CMSDK_GPIO_40010000_IRQ_0
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#define CMSDK_AHB_GPIO1 ARM_CMSDK_GPIO_40011000_BASE_ADDRESS
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#define IRQ_PORT1_ALL ARM_CMSDK_GPIO_40011000_IRQ_0
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#define CMSDK_AHB_GPIO2 ARM_CMSDK_GPIO_40012000_BASE_ADDRESS
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#define IRQ_PORT2_ALL ARM_CMSDK_GPIO_40012000_IRQ_0
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#define CMSDK_AHB_GPIO3 ARM_CMSDK_GPIO_40013000_BASE_ADDRESS
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#define IRQ_PORT3_ALL ARM_CMSDK_GPIO_40013000_IRQ_0
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/* End of SoC Level DTS fixup file */
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@ -11,17 +11,10 @@
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#define _ARM_BEETLE_SOC_IRQ_H_
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/* IRQ Numbers */
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#define IRQ_UART0 0 /* UART 0 RX and TX Combined Interrupt */
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#define IRQ_SPARE 1 /* Undefined */
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#define IRQ_UART1 2 /* UART 1 RX and TX Combined Interrupt */
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#define IRQ_I2C0 3 /* I2C 0 Interrupt */
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#define IRQ_I2C1 4 /* I2C 1 Interrupt */
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#define IRQ_RTC 5 /* RTC Interrupt */
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#define IRQ_PORT0_ALL 6 /* GPIO Port 0 combined Interrupt */
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#define IRQ_PORT1_ALL 7 /* GPIO Port 1 combined Interrupt */
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#define IRQ_TIMER0 8 /* TIMER 0 Interrupt */
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#define IRQ_TIMER1 9 /* TIMER 1 Interrupt */
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#define IRQ_DUALTIMER 10 /* Dual Timer Interrupt */
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#define IRQ_SPI0 11 /* SPI 0 Interrupt */
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#define IRQ_UARTOVF 12 /* Common UART Overflow Interrupt */
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#define IRQ_SPI1 13 /* SPI 1 Interrupt */
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#define IRQ_LLCC_RXEVT_VALID 39 /* Cordio */
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#define IRQ_LLCC_RXDMAH_DONE 40 /* Cordio */
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#define IRQ_LLCC_RXDMAL_DONE 41 /* Cordio */
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#define IRQ_PORT2_ALL 42 /* GPIO Port 2 combined Interrupt */
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#define IRQ_PORT3_ALL 43 /* GPIO Port 3 combined Interrupt */
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#define IRQ_TRNG 44 /* Random number generator Interrupt */
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#endif /* _ARM_BEETLE_SOC_IRQ_H_ */
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