arc: remove @return doc for void functions

For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2022-01-06 17:09:23 -08:00 committed by Anas Nashif
parent 25f87aac87
commit de9f396854
8 changed files with 19 additions and 71 deletions

View file

@ -24,7 +24,6 @@ GTEXT(_firq_enter)
GTEXT(_firq_exit)
/**
*
* @brief Work to be done before handing control to a FIRQ ISR
*
* The processor switches to a second register bank so registers from the
@ -41,8 +40,6 @@ GTEXT(_firq_exit)
* interrupt. An exception, however, can be taken.
*
* Assumption by _isr_demux: r3 is untouched by _firq_enter.
*
* @return N/A
*/
SECTION_FUNC(TEXT, _firq_enter)
@ -131,10 +128,7 @@ firq_nest:
/**
*
* @brief Work to be done exiting a FIRQ
*
* @return N/A
*/
SECTION_FUNC(TEXT, _firq_exit)

View file

@ -38,10 +38,8 @@ K_KERNEL_STACK_ARRAY_DEFINE(_firq_interrupt_stack, CONFIG_MP_NUM_CPUS,
K_KERNEL_STACK_DEFINE(_firq_interrupt_stack, CONFIG_ARC_FIRQ_STACK_SIZE);
#endif
/*
/**
* @brief Set the stack pointer for firq handling
*
* @return N/A
*/
void z_arc_firq_stack_set(void)
{
@ -83,14 +81,12 @@ void z_arc_firq_stack_set(void)
}
#endif
/*
/**
* @brief Enable an interrupt line
*
* Clear possible pending interrupts on the line, and enable the interrupt
* line. After this call, the CPU will receive interrupts for the specified
* @a irq.
*
* @return N/A
*/
void arch_irq_enable(unsigned int irq)
@ -98,13 +94,11 @@ void arch_irq_enable(unsigned int irq)
z_arc_v2_irq_unit_int_enable(irq);
}
/*
/**
* @brief Disable an interrupt line
*
* Disable an interrupt line. After this call, the CPU will stop receiving
* interrupts for the specified @a irq.
*
* @return N/A
*/
void arch_irq_disable(unsigned int irq)
@ -123,7 +117,7 @@ int arch_irq_is_enabled(unsigned int irq)
return z_arc_v2_irq_unit_int_enabled(irq);
}
/*
/**
* @internal
*
* @brief Set an interrupt's priority
@ -133,8 +127,6 @@ int arch_irq_is_enabled(unsigned int irq)
* The priority is verified if ASSERT_ON is enabled; max priority level
* depends on CONFIG_NUM_IRQ_PRIO_LEVELS.
*
* @return N/A
*/
void z_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
@ -156,13 +148,11 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
z_arc_v2_irq_unit_prio_set(irq, prio);
}
/*
/**
* @brief Spurious interrupt handler
*
* Installed in all dynamic interrupt slots at boot time. Throws an error if
* called.
*
* @return N/A
*/
void z_irq_spurious(const void *unused)

View file

@ -27,13 +27,10 @@
/* XXX - keep for future use in full-featured cache APIs */
#if 0
/**
*
* @brief Disable the i-cache if present
*
* For those ARC CPUs that have a i-cache present,
* invalidate the i-cache and then disable it.
*
* @return N/A
*/
static void disable_icache(void)
@ -51,13 +48,10 @@ static void disable_icache(void)
}
/**
*
* @brief Invalidate the data cache if present
*
* For those ARC CPUs that have a data cache present,
* invalidate the data cache.
*
* @return N/A
*/
static void invalidate_dcache(void)
@ -75,12 +69,9 @@ static void invalidate_dcache(void)
extern FUNC_NORETURN void z_cstart(void);
/**
*
* @brief Prepare to and run C code
*
* This routine prepares for the execution of and runs C code.
*
* @return N/A
*/
void _PrepC(void)

View file

@ -190,7 +190,6 @@ will be corrupted.
*/
/**
*
* @brief Work to be done before handing control to an IRQ ISR
*
* The processor pushes automatically all registers that need to be saved.
@ -198,8 +197,6 @@ will be corrupted.
* automatic switch to the IRQ stack: this must be done in software.
*
* Assumption by _isr_demux: r3 is untouched by _rirq_enter.
*
* @return N/A
*/
SECTION_FUNC(TEXT, _rirq_enter)
@ -228,10 +225,7 @@ rirq_nest:
/**
*
* @brief Work to be done exiting an IRQ
*
* @return N/A
*/
SECTION_FUNC(TEXT, _rirq_exit)

View file

@ -31,7 +31,6 @@ GTEXT(__reset)
GTEXT(__start)
/**
*
* @brief Reset vector
*
* Ran when the system comes out of reset. The processor is at supervisor level.
@ -40,8 +39,6 @@ GTEXT(__start)
*
* When these steps are completed, jump to _PrepC(), which will finish setting
* up the system for running C code.
*
* @return N/A
*/
SECTION_SUBSEC_FUNC(TEXT,_reset_and__start,__reset)

View file

@ -19,13 +19,11 @@
GTEXT(z_thread_entry_wrapper)
GTEXT(z_thread_entry_wrapper1)
/*
/**
* @brief Wrapper for z_thread_entry
*
* The routine pops parameters for the z_thread_entry from stack frame, prepared
* by the arch_new_thread() routine.
*
* @return N/A
*/
SECTION_FUNC(TEXT, z_thread_entry_wrapper)

View file

@ -52,11 +52,11 @@ GTEXT(arch_user_string_nlen)
GTEXT(z_arc_user_string_nlen_fault_start)
GTEXT(z_arc_user_string_nlen_fault_end)
GTEXT(z_arc_user_string_nlen_fixup)
/*
/**
* @brief Wrapper for z_thread_entry in the case of user thread
* The init parameters are in privileged stack
*
* @return N/A
* The init parameters are in privileged stack
*/
SECTION_FUNC(TEXT, z_user_thread_entry_wrapper)
seti _ARC_V2_INIT_IRQ_LOCK_KEY

View file

@ -37,12 +37,10 @@ extern "C" {
*
*/
/*
/**
* @brief Enable/disable interrupt
*
* Enables or disables the specified interrupt
*
* @return N/A
*/
static ALWAYS_INLINE
@ -59,12 +57,10 @@ void z_arc_v2_irq_unit_irq_enable_set(
arch_irq_unlock(key);
}
/*
/**
* @brief Enable interrupt
*
* Enables the specified interrupt
*
* @return N/A
*/
static ALWAYS_INLINE
@ -73,12 +69,10 @@ void z_arc_v2_irq_unit_int_enable(int irq)
z_arc_v2_irq_unit_irq_enable_set(irq, _ARC_V2_INT_ENABLE);
}
/*
/**
* @brief Disable interrupt
*
* Disables the specified interrupt
*
* @return N/A
*/
static ALWAYS_INLINE
@ -87,7 +81,7 @@ void z_arc_v2_irq_unit_int_disable(int irq)
z_arc_v2_irq_unit_irq_enable_set(irq, _ARC_V2_INT_DISABLE);
}
/*
/**
* @brief Poll the enable status of interrupt
*
* Polls the enable status of the specified interrupt
@ -110,12 +104,10 @@ bool z_arc_v2_irq_unit_int_enabled(int irq)
}
/*
/**
* @brief Set interrupt priority
*
* Set the priority of the specified interrupt
*
* @return N/A
*/
static ALWAYS_INLINE
@ -136,12 +128,10 @@ void z_arc_v2_irq_unit_prio_set(int irq, unsigned char prio)
}
#if defined(CONFIG_ARC_SECURE_FIRMWARE)
/*
/**
* @brief Configure the secure state of interrupt
*
* Configure the secure state of the specified interrupt
*
* @return N/A
*/
static ALWAYS_INLINE
void z_arc_v2_irq_uinit_secure_set(int irq, bool secure)
@ -164,15 +154,13 @@ void z_arc_v2_irq_uinit_secure_set(int irq, bool secure)
}
#endif
/*
/**
* @brief Set interrupt sensitivity
*
* Set the sensitivity of the specified interrupt to either
* _ARC_V2_INT_LEVEL or _ARC_V2_INT_PULSE. Level interrupts will remain
* asserted until the interrupt handler clears the interrupt at the peripheral.
* Pulse interrupts self-clear as the interrupt handler is entered.
*
* @return N/A
*/
static ALWAYS_INLINE
@ -206,14 +194,12 @@ bool z_arc_v2_irq_unit_is_in_isr(void)
return ((act & 0xffff) != 0U);
}
/*
/**
* @brief Sets an IRQ line to level/pulse trigger
*
* Sets the IRQ line <irq> to trigger an interrupt based on the level or the
* edge of the signal. Valid values for <trigger> are _ARC_V2_INT_LEVEL and
* _ARC_V2_INT_PULSE.
*
* @return N/A
*/
static ALWAYS_INLINE
void z_arc_v2_irq_unit_trigger_set(int irq, unsigned int trigger)
@ -226,7 +212,7 @@ void z_arc_v2_irq_unit_trigger_set(int irq, unsigned int trigger)
arch_irq_unlock(key);
}
/*
/**
* @brief Returns an IRQ line trigger type
*
* Gets the IRQ line <irq> trigger type.
@ -248,13 +234,11 @@ unsigned int z_arc_v2_irq_unit_trigger_get(int irq)
return ret;
}
/*
/**
* @brief Send EOI signal to interrupt unit
*
* This routine sends an EOI (End Of Interrupt) signal to the interrupt unit
* to clear a pulse-triggered interrupt.
*
* @return N/A
*/
static ALWAYS_INLINE
void z_arc_v2_irq_unit_int_eoi(int irq)