patrick/zephyr
1
0
Fork 0
Code Issues Pull requests Actions 8 Packages Projects Releases Wiki Activity

misc: nxp_s32_emios: enable and declare interrupt handler

Browse source 
This enables and declares interrupt handlers for eMIOS,
the handlers defined and implemented at HAL, the driver
takes the name for each id from interrupt-names devicetree

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This commit is contained in:
Dat Nguyen Duy 2023-09-11 11:35:38 +07:00 committed by Carles Cufí
parent 2243d7b717
commit e021108ace
3 changed files with 50 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

35
drivers/misc/nxp_s32_emios/nxp_s32_emios.c
View file

@ -12,12 +12,14 @@
LOG_MODULE_REGISTER(LOG_MODULE_NAME, CONFIG_NXP_S32_EMIOS_LOG_LEVEL);
#include <Emios_Mcl_Ip.h>
#include <Emios_Mcl_Ip_Irq.h>
#define DT_DRV_COMPAT nxp_s32_emios
struct nxp_s32_emios_config {
uint8_t instance;
Emios_Mcl_Ip_ConfigType *mcl_info;
void (*irq_config)(void);
};
static int nxp_s32_emios_init(const struct device *dev)
@ -29,6 +31,8 @@ static int nxp_s32_emios_init(const struct device *dev)
return -EINVAL;
}
config->irq_config();
return 0;
}
@ -87,11 +91,42 @@ static int nxp_s32_emios_init(const struct device *dev)
.masterBusConfig = &nxp_s32_emios_##n##_master_bus_config \
};
#define EMIOS_INTERRUPT_NAME(name) DT_CAT3(EMIOS, name, _IRQ)
/*
* The real interrupt handlers only defined in some circumstances, just add
* weak implementations to avoid populating so many preprocessor directives
*/
#define EMIOS_INTERRUPT_DEFINE(node_id, prop, idx) \
__weak void EMIOS_INTERRUPT_NAME(DT_STRING_TOKEN_BY_IDX(node_id, prop, idx))(void) {}
#define NXP_S32_EMIOS_INTERRUPT_DEFINE(n) \
DT_INST_FOREACH_PROP_ELEM(n, interrupt_names, EMIOS_INTERRUPT_DEFINE)
#define EMIOS_INTERRUPT_CONFIG(node_id, prop, idx) \
do { \
IRQ_CONNECT(DT_IRQ_BY_IDX(node_id, idx, irq), \
DT_IRQ_BY_IDX(node_id, idx, priority), \
EMIOS_INTERRUPT_NAME(DT_STRING_TOKEN_BY_IDX(node_id, prop, idx)),\
DEVICE_DT_GET(node_id), \
0); \
irq_enable(DT_IRQ_BY_IDX(node_id, idx, irq)); \
} while (false);
#define NXP_S32_EMIOS_INTERRUPT_CONFIG(n) \
static void nxp_s32_emios_##n##_interrupt_config(void) \
{ \
DT_INST_FOREACH_PROP_ELEM(n, interrupt_names, EMIOS_INTERRUPT_CONFIG) \
}
#define NXP_S32_EMIOS_INIT_DEVICE(n) \
NXP_S32_EMIOS_GENERATE_CONFIG(n) \
NXP_S32_EMIOS_INTERRUPT_DEFINE(n) \
NXP_S32_EMIOS_INTERRUPT_CONFIG(n) \
const struct nxp_s32_emios_config nxp_s32_emios_##n##_config = { \
.instance = NXP_S32_EMIOS_GET_INSTANCE(n), \
.mcl_info = (Emios_Mcl_Ip_ConfigType *)&nxp_s32_emios_##n##_mcl_config, \
.irq_config = nxp_s32_emios_##n##_interrupt_config, \
}; \
DEVICE_DT_INST_DEFINE(n, \
&nxp_s32_emios_init, \

6
dts/arm/nxp/nxp_s32k344_m7.dtsi
View file

@ -624,6 +624,8 @@
clocks = <&clock NXP_S32_EMIOS0_CLK>;
interrupts = <61 0>, <62 0>, <63 0>,
<64 0>, <65 0>, <66 0>;
interrupt-names = "0_0", "0_1", "0_2",
"0_3", "0_4", "0_5";
status = "disabled";
master_bus {
@ -676,6 +678,8 @@
clocks = <&clock NXP_S32_EMIOS1_CLK>;
interrupts = <69 0>, <70 0>, <71 0>,
<72 0>, <73 0>, <74 0>;
interrupt-names = "1_0", "1_1", "1_2",
"1_3", "1_4", "1_5";
status = "disabled";
master_bus {
@ -728,6 +732,8 @@
clocks = <&clock NXP_S32_EMIOS2_CLK>;
interrupts = <77 0>, <78 0>, <79 0>,
<80 0>, <81 0>, <82 0>;
interrupt-names = "2_0", "2_1", "2_2",
"2_3", "2_4", "2_5";
status = "disabled";
master_bus {

9
dts/bindings/misc/nxp,s32-emios.yaml
View file

@ -15,6 +15,15 @@ properties:
reg:
required: true
interrupts:
required: true
interrupt-names:
required: true
clocks:
required: true
clock-divider:
type: int
required: true