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dma/cavs_hda: Configure DGMBS only for host DMA configuration

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The DGMBS should be only set for the host side and not on the link DMA.

Fixes: #46632
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
This commit is contained in:
Peter Ujfalusi 2022-07-07 09:34:49 +03:00 committed by Fabio Baltieri
parent a727b8aaac
commit e243122c1e
2 changed files with 14 additions and 7 deletions
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20
drivers/dma/dma_cavs_hda.c
View file

@ -55,9 +55,13 @@ int cavs_hda_dma_host_in_config(const struct device *dev,
res = cavs_hda_set_buffer(cfg->base, channel, buf,
blk_cfg->block_size);
if (res == 0 && dma_cfg->source_data_size <= 3) {
/* set the sample container set bit to 16bits */
*DGCS(cfg->base, channel) |= DGCS_SCS;
if (res == 0) {
*DGMBS(cfg->base, channel) = blk_cfg->block_size & HDA_ALIGN_MASK;
if (dma_cfg->source_data_size <= 3) {
/* set the sample container set bit to 16bits */
*DGCS(cfg->base, channel) |= DGCS_SCS;
}
}
return res;
@ -87,9 +91,13 @@ int cavs_hda_dma_host_out_config(const struct device *dev,
res = cavs_hda_set_buffer(cfg->base, channel, buf,
blk_cfg->block_size);
if (res == 0 && dma_cfg->dest_data_size <= 3) {
/* set the sample container set bit to 16bits */
*DGCS(cfg->base, channel) |= DGCS_SCS;
if (res == 0) {
*DGMBS(cfg->base, channel) = blk_cfg->block_size & HDA_ALIGN_MASK;
if (dma_cfg->dest_data_size <= 3) {
/* set the sample container set bit to 16bits */
*DGCS(cfg->base, channel) |= DGCS_SCS;
}
}
return res;

1
soc/xtensa/intel_adsp/common/include/cavs_hda.h
View file

@ -178,7 +178,6 @@ static inline int cavs_hda_set_buffer(uint32_t base, uint32_t sid,
*DGBBA(base, sid) = aligned_addr;
*DGBS(base, sid) = aligned_size;
*DGMBS(base, sid) = aligned_size;
return 0;
}