From e7b6a08d8ffd3ef283dd5fa2b625896f1d443b54 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Cab=C3=A9?= Date: Wed, 13 Mar 2024 14:40:36 +0100 Subject: [PATCH] doc: soc: hwmv2: fix altera dead links MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit fixing dead links to some Altera SoC files Signed-off-by: Benjamin Cabé --- boards/altr/max10/doc/index.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/boards/altr/max10/doc/index.rst b/boards/altr/max10/doc/index.rst index 64d7f14257..ca66d77a0a 100644 --- a/boards/altr/max10/doc/index.rst +++ b/boards/altr/max10/doc/index.rst @@ -92,11 +92,11 @@ Reference CPU ============= A reference CPU design of a Nios II/f core is included in the Zephyr tree -in the :zephyr_file:`soc/altera/zephyr_nios2f/cpu` directory. +in the :zephyr_file:`soc/altr/zephyr_nios2f/cpu` directory. Flash this CPU using the ``nios2-configure-sof`` SDK tool with the FPGA configuration file -:zephyr_file:`soc/altera/zephyr_nios2f/cpu/ghrd_10m50da.sof`: +:zephyr_file:`soc/altr/zephyr_nios2f/cpu/ghrd_10m50da.sof`: .. code-block:: console