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soc: arm: silabs: remove soc_gpio_configure wrapper

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It would be better to use GPIO_PinModeSet() functions directly
in the drivers.

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
This commit is contained in:
Pawel Czarnecki 2022-10-24 10:20:45 +02:00 committed by Carles Cufí
parent 1d5a387637
commit e8d3673c13
9 changed files with 28 additions and 37 deletions
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8
drivers/ethernet/eth_gecko.c
View file

@ -441,8 +441,10 @@ static void eth_init_pins(const struct device *dev)
eth->ROUTEPEN = 0;
#if DT_INST_NODE_HAS_PROP(0, location_rmii)
struct soc_gpio_pin *pin;
for (idx = 0; idx < ARRAY_SIZE(cfg->pin_list->rmii); idx++)
soc_gpio_configure(&cfg->pin_list->rmii[idx]);
pin = &cfg->pin_list->rmii[idx];
GPIO_PinModeSet(pin->port, pin->pin, pin->mode, pin->out);
eth->ROUTELOC1 |= (DT_INST_PROP(0, location_rmii) <<
_ETH_ROUTELOC1_RMIILOC_SHIFT);
@ -450,8 +452,10 @@ static void eth_init_pins(const struct device *dev)
#endif
#if DT_INST_NODE_HAS_PROP(0, location_mdio)
struct soc_gpio_pin *pin;
for (idx = 0; idx < ARRAY_SIZE(cfg->pin_list->mdio); idx++)
soc_gpio_configure(&cfg->pin_list->mdio[idx]);
pin = &cfg->pin_list->mdio[idx];
GPIO_PinModeSet(pin->port, pin->pin, pin->mode, pin->out);
eth->ROUTELOC1 |= (DT_INST_PROP(0, location_mdio) <<
_ETH_ROUTELOC1_MDIOLOC_SHIFT);

4
drivers/i2c/i2c_gecko.c
View file

@ -50,8 +50,8 @@ void i2c_gecko_config_pins(const struct device *dev,
I2C_TypeDef *base = DEV_BASE(dev);
const struct i2c_gecko_config *config = dev->config;
soc_gpio_configure(pin_scl);
soc_gpio_configure(pin_sda);
GPIO_PinModeSet(pin_scl->port, pin_scl->pin, pin_scl->mode, pin_scl->out);
GPIO_PinModeSet(pin_sda->port, pin_sda->pin, pin_sda->mode, pin_sda->out);
#ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
base->ROUTEPEN = I2C_ROUTEPEN_SDAPEN | I2C_ROUTEPEN_SCLPEN;

6
drivers/serial/leuart_gecko.c
View file

@ -245,8 +245,10 @@ static void leuart_gecko_init_pins(const struct device *dev)
const struct leuart_gecko_config *config = dev->config;
LEUART_TypeDef *base = DEV_BASE(dev);
soc_gpio_configure(&config->pin_rx);
soc_gpio_configure(&config->pin_tx);
GPIO_PinModeSet(config->pin_rx.port, config->pin_rx.pin,
config->pin_rx.mode, config->pin_rx.out);
GPIO_PinModeSet(config->pin_tx.port, config->pin_tx.pin,
config->pin_tx.mode, config->pin_tx.out);
#ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
base->ROUTEPEN = LEUART_ROUTEPEN_RXPEN | LEUART_ROUTEPEN_TXPEN;

12
drivers/serial/uart_gecko.c
View file

@ -297,8 +297,10 @@ static void uart_gecko_init_pins(const struct device *dev)
const struct uart_gecko_config *config = dev->config;
/* Configure RX and TX */
soc_gpio_configure(&config->pin_rx);
soc_gpio_configure(&config->pin_tx);
GPIO_PinModeSet(config->pin_rx.port, config->pin_rx.pin,
config->pin_rx.mode, config->pin_rx.out);
GPIO_PinModeSet(config->pin_tx.port, config->pin_tx.pin,
config->pin_tx.mode, config->pin_tx.out);
#ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
/* For SOCs with configurable pin locations (set in SOC Kconfig) */
@ -325,8 +327,10 @@ static void uart_gecko_init_pins(const struct device *dev)
#ifdef UART_GECKO_HW_FLOW_CONTROL
/* Configure HW flow control (RTS, CTS) */
if (config->hw_flowcontrol) {
soc_gpio_configure(&config->pin_rts);
soc_gpio_configure(&config->pin_cts);
GPIO_PinModeSet(config->pin_rts.port, config->pin_rts.pin,
config->pin_rts.mode, config->pin_rts.out);
GPIO_PinModeSet(config->pin_cts.port, config->pin_cts.pin,
config->pin_cts.mode, config->pin_cts.out);
#ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
config->base->ROUTEPEN =

9
drivers/spi/spi_gecko.c
View file

@ -188,9 +188,12 @@ static void spi_gecko_init_pins(const struct device *dev)
{
const struct spi_gecko_config *config = dev->config;
soc_gpio_configure(&config->pin_rx);
soc_gpio_configure(&config->pin_tx);
soc_gpio_configure(&config->pin_clk);
GPIO_PinModeSet(config->pin_rx.port, config->pin_rx.pin,
config->pin_rx.mode, config->pin_rx.out);
GPIO_PinModeSet(config->pin_tx.port, config->pin_tx.pin,
config->pin_tx.mode, config->pin_tx.out);
GPIO_PinModeSet(config->pin_clk.port, config->pin_clk.pin,
config->pin_clk.mode, config->pin_clk.out);
/* disable all pins while configuring */
config->base->ROUTEPEN = 0;

2
soc/arm/silabs_exx32/common/CMakeLists.txt
View file

@ -1,5 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
zephyr_sources(soc.c soc_gpio.c)
zephyr_sources(soc.c)
zephyr_sources_ifdef(CONFIG_PM soc_power.c)

2
soc/arm/silabs_exx32/common/soc.c
View file

@ -168,7 +168,7 @@ static void swo_init(void)
#endif
#endif /* _SILICON_LABS_32B_SERIES_2 */
soc_gpio_configure(&pin_swo);
GPIO_PinModeSet(pin_swo.port, pin_swo.pin, pin_swo.mode, pin_swo.out);
}
#endif /* CONFIG_LOG_BACKEND_SWO */

16
soc/arm/silabs_exx32/common/soc_gpio.c
View file

@ -1,16 +0,0 @@
/*
* Copyright (c) 2017 Christian Taedcke
* SPDX-License-Identifier: Apache-2.0
*/
/** @file
* @brief Silabs EXX32 MCU family General Purpose Input Output (GPIO)
* module HAL driver.
*/
#include "soc_gpio.h"
void soc_gpio_configure(const struct soc_gpio_pin *pin)
{
GPIO_PinModeSet(pin->port, pin->pin, pin->mode, pin->out);
}

6
soc/arm/silabs_exx32/common/soc_gpio.h
View file

@ -25,12 +25,6 @@ struct soc_gpio_pin {
unsigned int out; /** out register value */
};
/**
* @brief Configure GPIO pin
* @param[in] pin configuration data
*/
void soc_gpio_configure(const struct soc_gpio_pin *pin);
#ifdef __cplusplus
}
#endif