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ieee802154: mcr20a: Cleanup Kconfig and DT support

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Now that all SPI controllers support DTS we can remove the Kconfig
support for non-DTS options.  We also cleanup some defines that should
have be DT_MCR20A_ instead of CONFIG_MCR20A_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2018-11-15 09:00:25 -06:00 committed by Anas Nashif
parent 1b3b0153a6
commit ea198e3e4b
4 changed files with 38 additions and 85 deletions
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18
boards/arm/frdm_k64f/dts_fixup.h
View file

@ -4,12 +4,12 @@
#define DT_FXOS8700_GPIO_NAME DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_CONTROLLER
#define DT_FXOS8700_GPIO_PIN DT_NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_PIN
#define CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BUS_NAME
#define CONFIG_IEEE802154_MCR20A_SPI_SLAVE DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BASE_ADDRESS
#define CONFIG_IEEE802154_MCR20A_SPI_FREQ DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_SPI_MAX_FREQUENCY
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME DT_NXP_KINETIS_DSPI_4002C000_CS_GPIOS_CONTROLLER
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN DT_NXP_KINETIS_DSPI_4002C000_CS_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_IRQ_B_NAME DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_IRQ_B_PIN DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_RESET_NAME DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_RESET_PIN DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_PIN
#define DT_IEEE802154_MCR20A_SPI_DRV_NAME DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BUS_NAME
#define DT_IEEE802154_MCR20A_SPI_SLAVE DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BASE_ADDRESS
#define DT_IEEE802154_MCR20A_SPI_FREQ DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_SPI_MAX_FREQUENCY
#define DT_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME DT_NXP_KINETIS_DSPI_4002C000_CS_GPIOS_CONTROLLER
#define DT_IEEE802154_MCR20A_GPIO_SPI_CS_PIN DT_NXP_KINETIS_DSPI_4002C000_CS_GPIOS_PIN
#define DT_MCR20A_GPIO_IRQ_B_NAME DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_CONTROLLER
#define DT_MCR20A_GPIO_IRQ_B_PIN DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_PIN
#define DT_MCR20A_GPIO_RESET_NAME DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_CONTROLLER
#define DT_MCR20A_GPIO_RESET_PIN DT_NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_PIN

47
drivers/ieee802154/Kconfig.mcr20a
View file

@ -18,53 +18,6 @@ config IEEE802154_MCR20A_DRV_NAME
help
This option sets the driver name
if !HAS_DTS_SPI
config IEEE802154_MCR20A_SPI_DRV_NAME
string "SPI driver's name to use to access MCR20A"
default SPI_0_NAME
help
This option is mandatory to set which SPI controller to use in order
to actually control the MCR20A chip.
config IEEE802154_MCR20A_SPI_FREQ
int "SPI system frequency"
default 4000000
help
This option sets the SPI controller's frequency. Beware this value
depends on the SPI controller being used and also on the system
clock.
config IEEE802154_MCR20A_SPI_SLAVE
int "SPI slave linked to MCR20A"
default 0
help
This option sets the SPI slave number SPI controller has to switch
to when dealing with MCR20A chip.
config IEEE802154_MCR20A_GPIO_SPI_CS
bool "Manage SPI CS through a GPIO pin"
help
This option is useful if one needs to manage SPI CS through a GPIO
pin to by-pass the SPI controller's CS logic.
config IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME
string "GPIO driver's name to use to drive SPI CS through"
depends on IEEE802154_MCR20A_GPIO_SPI_CS
help
This option is mandatory to set which GPIO controller to use in order
to actually emulate the SPI CS.
config IEEE802154_MCR20A_GPIO_SPI_CS_PIN
int "GPIO PIN to use to drive SPI CS through"
default 0
depends on IEEE802154_MCR20A_GPIO_SPI_CS
help
This option is mandatory to set which GPIO pin to use in order
to actually emulate the SPI CS.
endif # !HAS_DTS_SPI
if !HAS_DTS_GPIO
config MCR20A_GPIO_IRQ_B_NAME

40
drivers/ieee802154/ieee802154_mcr20a.c
View file

@ -803,7 +803,7 @@ static inline void set_reset(struct device *dev, u32_t value)
struct mcr20a_context *mcr20a = dev->driver_data;
gpio_pin_write(mcr20a->reset_gpio,
CONFIG_MCR20A_GPIO_RESET_PIN, value);
DT_MCR20A_GPIO_RESET_PIN, value);
}
static void enable_irqb_interrupt(struct mcr20a_context *mcr20a,
@ -811,10 +811,10 @@ static void enable_irqb_interrupt(struct mcr20a_context *mcr20a,
{
if (enable) {
gpio_pin_enable_callback(mcr20a->irq_gpio,
CONFIG_MCR20A_GPIO_IRQ_B_PIN);
DT_MCR20A_GPIO_IRQ_B_PIN);
} else {
gpio_pin_disable_callback(mcr20a->irq_gpio,
CONFIG_MCR20A_GPIO_IRQ_B_PIN);
DT_MCR20A_GPIO_IRQ_B_PIN);
}
}
@ -822,7 +822,7 @@ static inline void setup_gpio_callbacks(struct mcr20a_context *mcr20a)
{
gpio_init_callback(&mcr20a->irqb_cb,
irqb_int_handler,
BIT(CONFIG_MCR20A_GPIO_IRQ_B_PIN));
BIT(DT_MCR20A_GPIO_IRQ_B_PIN));
gpio_add_callback(mcr20a->irq_gpio, &mcr20a->irqb_cb);
}
@ -1288,7 +1288,7 @@ static int power_on_and_setup(struct device *dev)
_usleep(50);
timeout--;
gpio_pin_read(mcr20a->irq_gpio,
CONFIG_MCR20A_GPIO_IRQ_B_PIN, &status);
DT_MCR20A_GPIO_IRQ_B_PIN, &status);
} while (status && timeout);
if (status) {
@ -1341,28 +1341,28 @@ static inline int configure_gpios(struct device *dev)
struct mcr20a_context *mcr20a = dev->driver_data;
/* setup gpio for the modem interrupt */
mcr20a->irq_gpio = device_get_binding(CONFIG_MCR20A_GPIO_IRQ_B_NAME);
mcr20a->irq_gpio = device_get_binding(DT_MCR20A_GPIO_IRQ_B_NAME);
if (mcr20a->irq_gpio == NULL) {
LOG_ERR("Failed to get pointer to %s device",
CONFIG_MCR20A_GPIO_IRQ_B_NAME);
DT_MCR20A_GPIO_IRQ_B_NAME);
return -EINVAL;
}
gpio_pin_configure(mcr20a->irq_gpio,
CONFIG_MCR20A_GPIO_IRQ_B_PIN,
DT_MCR20A_GPIO_IRQ_B_PIN,
GPIO_DIR_IN | GPIO_INT | GPIO_INT_EDGE |
GPIO_PUD_PULL_UP |
GPIO_INT_ACTIVE_LOW);
/* setup gpio for the modems reset */
mcr20a->reset_gpio = device_get_binding(CONFIG_MCR20A_GPIO_RESET_NAME);
mcr20a->reset_gpio = device_get_binding(DT_MCR20A_GPIO_RESET_NAME);
if (mcr20a->reset_gpio == NULL) {
LOG_ERR("Failed to get pointer to %s device",
CONFIG_MCR20A_GPIO_RESET_NAME);
DT_MCR20A_GPIO_RESET_NAME);
return -EINVAL;
}
gpio_pin_configure(mcr20a->reset_gpio, CONFIG_MCR20A_GPIO_RESET_PIN,
gpio_pin_configure(mcr20a->reset_gpio, DT_MCR20A_GPIO_RESET_PIN,
GPIO_DIR_OUT);
set_reset(dev, 1);
@ -1374,7 +1374,7 @@ static inline int configure_spi(struct device *dev)
struct mcr20a_context *mcr20a = dev->driver_data;
mcr20a->spi = device_get_binding(
CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME);
DT_IEEE802154_MCR20A_SPI_DRV_NAME);
if (!mcr20a->spi) {
LOG_ERR("Unable to get SPI device");
return -ENODEV;
@ -1382,29 +1382,29 @@ static inline int configure_spi(struct device *dev)
#if defined(CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS)
mcr20a->cs_ctrl.gpio_dev = device_get_binding(
CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME);
DT_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME);
if (!mcr20a->cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get GPIO SPI CS device");
return -ENODEV;
}
mcr20a->cs_ctrl.gpio_pin = CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN;
mcr20a->cs_ctrl.gpio_pin = DT_IEEE802154_MCR20A_GPIO_SPI_CS_PIN;
mcr20a->cs_ctrl.delay = 0;
mcr20a->spi_cfg.cs = &mcr20a->cs_ctrl;
LOG_DBG("SPI GPIO CS configured on %s:%u",
CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME,
CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN);
DT_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME,
DT_IEEE802154_MCR20A_GPIO_SPI_CS_PIN);
#endif /* CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS */
mcr20a->spi_cfg.frequency = CONFIG_IEEE802154_MCR20A_SPI_FREQ;
mcr20a->spi_cfg.frequency = DT_IEEE802154_MCR20A_SPI_FREQ;
mcr20a->spi_cfg.operation = SPI_WORD_SET(8);
mcr20a->spi_cfg.slave = CONFIG_IEEE802154_MCR20A_SPI_SLAVE;
mcr20a->spi_cfg.slave = DT_IEEE802154_MCR20A_SPI_SLAVE;
LOG_DBG("SPI configured %s, %d",
CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME,
CONFIG_IEEE802154_MCR20A_SPI_SLAVE);
DT_IEEE802154_MCR20A_SPI_DRV_NAME,
DT_IEEE802154_MCR20A_SPI_SLAVE);
return 0;
}

18
soc/arm/nxp_kinetis/kwx/dts_fixup.h
View file

@ -95,15 +95,15 @@
#define DT_SPI_1_CLOCK_NAME DT_NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER
#define DT_SPI_1_CLOCK_SUBSYS DT_NXP_KINETIS_DSPI_4002D000_CLOCK_NAME
#define CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_BUS_NAME
#define CONFIG_IEEE802154_MCR20A_SPI_SLAVE DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_BASE_ADDRESS
#define CONFIG_IEEE802154_MCR20A_SPI_FREQ DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_SPI_MAX_FREQUENCY
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME DT_NXP_KINETIS_DSPI_4002D000_CS_GPIOS_CONTROLLER
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN DT_NXP_KINETIS_DSPI_4002D000_CS_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_IRQ_B_NAME DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_IRQB_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_IRQ_B_PIN DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_IRQB_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_RESET_NAME DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_RESET_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_RESET_PIN DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_RESET_GPIOS_PIN
#define DT_IEEE802154_MCR20A_SPI_DRV_NAME DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_BUS_NAME
#define DT_IEEE802154_MCR20A_SPI_SLAVE DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_BASE_ADDRESS
#define DT_IEEE802154_MCR20A_SPI_FREQ DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_SPI_MAX_FREQUENCY
#define DT_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME DT_NXP_KINETIS_DSPI_4002D000_CS_GPIOS_CONTROLLER
#define DT_IEEE802154_MCR20A_GPIO_SPI_CS_PIN DT_NXP_KINETIS_DSPI_4002D000_CS_GPIOS_PIN
#define DT_MCR20A_GPIO_IRQ_B_NAME DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_IRQB_GPIOS_CONTROLLER
#define DT_MCR20A_GPIO_IRQ_B_PIN DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_IRQB_GPIOS_PIN
#define DT_MCR20A_GPIO_RESET_NAME DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_RESET_GPIOS_CONTROLLER
#define DT_MCR20A_GPIO_RESET_PIN DT_NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_RESET_GPIOS_PIN
#define DT_USBD_KINETIS_NAME DT_NXP_KINETIS_USBD_40072000_LABEL
#define DT_USBD_KINETIS_IRQ DT_NXP_KINETIS_USBD_40072000_IRQ_USB_OTG