drivers: pinctrl: silabs: add spi handling
This commit adds pinctrl configuration for SPI on USART. Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
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@ -10,12 +10,17 @@
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int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
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{
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#ifdef CONFIG_UART_GECKO
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struct soc_gpio_pin rxpin = {0};
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struct soc_gpio_pin txpin = {0};
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USART_TypeDef *base = (USART_TypeDef *)reg;
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uint8_t loc;
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int usart_num = USART_NUM(base);
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uint8_t loc;
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#ifdef CONFIG_SPI_GECKO
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struct soc_gpio_pin spi_pin_cfg = {0, 0, 0, 0};
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#endif /* CONFIG_SPI_GECKO */
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#ifdef CONFIG_UART_GECKO
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struct soc_gpio_pin rxpin = {0, 0, 0, 0};
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struct soc_gpio_pin txpin = {0, 0, 0, 0};
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#endif /* CONFIG_UART_GECKO */
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for (uint8_t i = 0U; i < pin_cnt; i++) {
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@ -27,7 +32,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
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rxpin.mode = gpioModeInput;
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rxpin.out = 1;
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GPIO_PinModeSet(rxpin.port, rxpin.pin, rxpin.mode,
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rxpin.out);
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rxpin.out);
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break;
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case GECKO_FUN_UART_TX:
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txpin.port = GECKO_GET_PORT(pins[i]);
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@ -35,12 +40,12 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
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txpin.mode = gpioModePushPull;
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txpin.out = 1;
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GPIO_PinModeSet(txpin.port, txpin.pin, txpin.mode,
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txpin.out);
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txpin.out);
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break;
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case GECKO_FUN_UART_LOC:
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loc = GECKO_GET_LOC(pins[i]);
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#ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
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/* For SOCs with configurable pin locations (set in SOC Kconfig) */
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/* For SOCs with configurable pin_cfg locations (set in SOC Kconfig) */
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base->ROUTEPEN = USART_ROUTEPEN_RXPEN | USART_ROUTEPEN_TXPEN;
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base->ROUTELOC0 = (loc << _USART_ROUTELOC0_TXLOC_SHIFT) |
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(loc << _USART_ROUTELOC0_RXLOC_SHIFT);
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@ -94,9 +99,46 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
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#endif /* UART_GECKO_HW_FLOW_CONTROL */
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break;
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#endif /* CONFIG_UART_GECKO */
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#ifdef CONFIG_SPI_GECKO
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case GECKO_FUN_SPI_SCK:
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spi_pin_cfg.port = GECKO_GET_PORT(pins[i]);
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spi_pin_cfg.pin = GECKO_GET_PIN(pins[i]);
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spi_pin_cfg.mode = gpioModePushPull;
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spi_pin_cfg.out = 1;
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GPIO->USARTROUTE[usart_num].ROUTEEN |= GPIO_USART_ROUTEEN_CLKPEN;
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GPIO->USARTROUTE[usart_num].CLKROUTE =
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(spi_pin_cfg.pin << _GPIO_USART_CLKROUTE_PIN_SHIFT) |
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(spi_pin_cfg.port << _GPIO_USART_CLKROUTE_PORT_SHIFT);
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break;
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case GECKO_FUN_SPI_MOSI:
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spi_pin_cfg.port = GECKO_GET_PORT(pins[i]);
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spi_pin_cfg.pin = GECKO_GET_PIN(pins[i]);
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spi_pin_cfg.mode = gpioModePushPull;
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spi_pin_cfg.out = 1;
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GPIO->USARTROUTE[usart_num].ROUTEEN |= GPIO_USART_ROUTEEN_TXPEN;
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GPIO->USARTROUTE[usart_num].TXROUTE =
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(spi_pin_cfg.pin << _GPIO_USART_TXROUTE_PIN_SHIFT) |
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(spi_pin_cfg.port << _GPIO_USART_TXROUTE_PORT_SHIFT);
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break;
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case GECKO_FUN_SPI_MISO:
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spi_pin_cfg.port = GECKO_GET_PORT(pins[i]);
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spi_pin_cfg.pin = GECKO_GET_PIN(pins[i]);
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spi_pin_cfg.mode = gpioModeInput;
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spi_pin_cfg.out = 1;
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GPIO->USARTROUTE[usart_num].ROUTEEN |= GPIO_USART_ROUTEEN_RXPEN;
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GPIO->USARTROUTE[usart_num].RXROUTE =
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(spi_pin_cfg.pin << _GPIO_USART_RXROUTE_PIN_SHIFT) |
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(spi_pin_cfg.port << _GPIO_USART_RXROUTE_PORT_SHIFT);
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break;
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#endif /* CONFIG_SPI_GECKO */
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default:
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return -ENOTSUP;
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}
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#ifdef CONFIG_SPI_GECKO
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GPIO_PinModeSet(spi_pin_cfg.port, spi_pin_cfg.pin,
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spi_pin_cfg.mode, spi_pin_cfg.out);
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#endif /* CONFIG_SPI_GECKO */
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}
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return 0;
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@ -2,7 +2,7 @@ description: GECKO USART SPI
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compatible: "silabs,gecko-spi-usart"
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include: spi-controller.yaml
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include: [spi-controller.yaml, pinctrl-device.yaml]
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properties:
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reg:
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@ -21,15 +21,12 @@ properties:
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location-rx:
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type: array
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required: true
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description: RX pin configuration defined as <location port pin>
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location-tx:
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type: array
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required: true
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description: TX pin configuration defined as <location port pin>
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location-clk:
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type: array
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required: true
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description: CLK pin configuration defined as <location port pin>
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@ -61,6 +61,11 @@
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/** UART LOCATION */
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#define GECKO_FUN_UART_LOC 4U
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#define GECKO_FUN_SPI_MISO 5U
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#define GECKO_FUN_SPI_MOSI 6U
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#define GECKO_FUN_SPI_CSN 7U
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#define GECKO_FUN_SPI_SCK 8U
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/** @} */
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/**
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