boards: arm: Add support for STM32L476G Discovery board

Add configuration, pinmux, dts and documentation for the STM32L476G
Discovery board based on the STM32L476VG SoC.

Signed-off-by: Arthur SFEZ <arthur.sfez@gmail.com>

boards/arm/stm32l476g_disco/CMakeLists.txt

@@ -0,0 +1,3 @@
+zephyr_library()
+zephyr_library_sources(pinmux.c)
+zephyr_library_include_directories(${PROJECT_SOURCE_DIR}/drivers)

boards/arm/stm32l476g_disco/Kconfig.board

@@ -0,0 +1,10 @@
+# Kconfig - STM32L476G Discovery board configuration
+#
+# Copyright (c) 2017 Arthur Sfez
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config BOARD_STM32L476G_DISCO
+	bool "STM32L476G Discovery Development Board"
+	depends on SOC_STM32L476XG

boards/arm/stm32l476g_disco/Kconfig.defconfig

@@ -0,0 +1,13 @@
+# Kconfig - STM32L476G DISCOVERY board configuration
+#
+# Copyright (c) 2017 Arthur Sfez
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if BOARD_STM32L476G_DISCO
+
+config BOARD
+	default stm32l476g_disco
+
+endif # BOARD_STM32L476G_DISCO

boards/arm/stm32l476g_disco/board.cmake

@@ -0,0 +1 @@
+include($ENV{ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/arm/stm32l476g_disco/board.h

@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2017 Arthur Sfez
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __INC_BOARD_H
+#define __INC_BOARD_H
+
+#include <soc.h>
+
+/* LD4 red LED */
+#define LD4_GPIO_PORT	"GPIOB"
+#define LD4_GPIO_PIN	2
+
+/* LD5 green LED */
+#define LD5_GPIO_PORT	"GPIOE"
+#define LD5_GPIO_PIN	8
+
+/* Create aliases to make the basic samples work */
+#define LED0_GPIO_PORT	LD4_GPIO_PORT
+#define LED0_GPIO_PIN	LD4_GPIO_PIN
+#define LED1_GPIO_PORT	LD5_GPIO_PORT
+#define LED1_GPIO_PIN	LD5_GPIO_PIN
+
+#endif /* __INC_BOARD_H */

boards/arm/stm32l476g_disco/doc/stm32l476g_disco.rst

@@ -0,0 +1,220 @@
+.. _stm32l476g_disco_board:
+
+ST STM32L476G Discovery
+########################
+
+Overview
+********
+
+The STM32L476G Discovery board features an ARM Cortex-M4 based STM32L476VG MCU
+with a wide range of connectivity support and configurations. Here are
+some highlights of the STM32L476G Discovery board:
+
+
+- STM32L476VGT6 microcontroller featuring 1 Mbyte of Flash memory, 128 Kbytes of RAM in LQFP100 package
+- On-board ST-LINK/V2-1 supporting USB re-enumeration capability
+- Three different interfaces supported on USB:
+
+    - Virtual com port
+    - Mass storage
+    - Debug port
+
+- LCD 24 segments, 4 commons in DIP 28 package
+- Seven LEDs:
+
+    - LD1 (red/green) for USB communication
+    - LD2 (red) for 3.3 V power on
+    - LD3 Over current (red)
+    - LD4 (red), LD5 (green) two user LEDs
+    - LD6 (green), LD7 (red) USB OTG FS LEDs
+
+- Pushbutton (reset)
+- Four directions Joystick with selection
+- USB OTG FS with micro-AB connector
+- SAI Audio DAC, Stereo with output jack
+- Digital microphone, accelerometer, magnetometer and gyroscope MEMS
+- 128-Mbit Quad-SPI Flash memory
+- MCU current ammeter with 4 ranges and auto-calibration
+- Connector for external board or RF-EEPROM
+- Four power supply options:
+    - ST-LINK/V2-1
+    - USB FS connector
+    - External 5 V
+    - CR2032 battery (not provided)
+
+.. image:: img/en.stm32l476g-disco.jpg
+     :width: 450px
+     :align: center
+     :height: 394px
+     :alt: STM32L476G Discovery
+
+More information about the board can be found at the `STM32L476G Discovery website`_.
+
+Hardware
+********
+
+The STM32L476VG SoC provides the following hardware features:
+
+- Ultra-low-power with FlexPowerControl (down to 130 nA Standby mode and 100 uA/MHz run mode)
+- Core: ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
+- Clock Sources:
+    - 4 to 48 MHz crystal oscillator
+    - 32 kHz crystal oscillator for RTC (LSE)
+    - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
+    - Internal low-power 32 kHz RC ( |plusminus| 5%)
+    - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
+      LSE (better than  |plusminus| 0.25 % accuracy)
+    - 3 PLLs for system clock, USB, audio, ADC
+- RTC with HW calendar, alarms and calibration
+- LCD 8 x 40 or 4 x 44 with step-up converter
+- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
+- 16x timers:
+    - 2x 16-bit advanced motor-control
+    - 2x 32-bit and 5x 16-bit general purpose
+    - 2x 16-bit basic
+    - 2x low-power 16-bit timers (available in Stop mode)
+    - 2x watchdogs
+    - SysTick timer
+- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
+- Memories
+    - Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection
+    - Up to 128 KB of SRAM including 32 KB with hardware parity check
+    - External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
+    - Quad SPI memory interface
+- 4x digital filters for sigma delta modulator
+- Rich analog peripherals (independent supply)
+    - 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
+    - 2x 12-bit DAC, low-power sample and hold
+    - 2x operational amplifiers with built-in PGA
+    - 2x ultra-low-power comparators
+- 18x communication interfaces
+    - USB OTG 2.0 full-speed, LPM and BCD
+    - 2x SAIs (serial audio interface)
+    - 3x I2C FM+(1 Mbit/s), SMBus/PMBus
+    - 6x USARTs (ISO 7816, LIN, IrDA, modem)
+    - 3x SPIs (4x SPIs with the Quad SPI)
+    - CAN (2.0B Active) and SDMMC interface
+    - SWPMI single wire protocol master I/F
+- 14-channel DMA controller
+- True random number generator
+- CRC calculation unit, 96-bit unique ID
+- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
+
+
+More information about STM32L476VG can be found here:
+       - `STM32L476VG on www.st.com`_
+       - `STM32L476 reference manual`_
+
+
+Supported Features
+==================
+
+The Zephyr stm32l476g_disco board configuration supports the following hardware features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+| PINMUX    | on-chip    | pinmux                              |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+
+Other hardware features are not yet supported on this Zephyr port.
+
+The default configuration can be found in the defconfig file:
+
+	``boards/arm/stm32l476g_disco/stm32l476g_disco_defconfig``
+
+
+Connections and IOs
+===================
+
+STM32L476G Discovery Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
+input/output, pull-up, etc.
+
+For mode details please refer to `STM32L476G Discovery board User Manual`_.
+
+Default Zephyr Peripheral Mapping:
+----------------------------------
+
+- UART_2_TX : PD5
+- UART_2_RX : PD6
+- LD4 : PB2
+- LD5 : PE8
+
+System Clock
+------------
+
+STM32L476G Discovery System Clock could be driven by an internal or external oscillator,
+as well as the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz,
+driven by 16MHz high speed internal oscillator.
+
+Serial Port
+-----------
+
+STM32L476G Discovery board has 6 U(S)ARTs. The Zephyr console output is assigned to UART2.
+Default settings are 115200 8N1.
+
+
+Programming and Debugging
+*************************
+
+Flashing
+========
+
+STM32L476G Discovery board includes an ST-LINK/V2-1 embedded debug tool interface.
+This interface is supported by the openocd version included in Zephyr SDK.
+
+Flashing an application to STM32L476G Discovery
+-----------------------------------------------
+
+Connect the STM32L476G Discovery to your host computer using the USB
+port, then run a serial host program to connect with your Discovery
+board. For example:
+
+.. code-block:: console
+
+   $ minicom -D /dev/ttyACM0
+
+Then, build and flash in the usual way. Here is an example for the
+:ref:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: stm32l476g_disco
+   :goals: build flash
+
+You should see the following message on the console:
+
+.. code-block:: console
+
+   Hello World! arm
+
+Debugging
+=========
+
+You can debug an application in the usual way.  Here is an example for the
+:ref:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: stm32l476g_disco
+   :maybe-skip-config:
+   :goals: debug
+
+.. _STM32L476G Discovery website:
+   http://www.st.com/en/evaluation-tools/32l476gdiscovery.html
+
+.. _STM32L476G Discovery board User Manual:
+   http://www.st.com/resource/en/user_manual/dm00172179.pdf
+
+.. _STM32L476VG on www.st.com:
+   http://www.st.com/en/microcontrollers/stm32l476vg.html
+
+.. _STM32L476 reference manual:
+   http://www.st.com/resource/en/reference_manual/DM00083560.pdf

boards/arm/stm32l476g_disco/dts.fixup

@@ -0,0 +1,37 @@
+/* This file is a temporary workaround for mapping of the generated information
+ * to the current driver definitions.  This will be removed when the drivers
+ * are modified to handle the generated information, or the mapping of
+ * generated data matches the driver definitions.
+ */
+
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+
+#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS	ST_STM32_USART_40013800_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_1_BAUD_RATE	ST_STM32_USART_40013800_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_1_IRQ_PRI	ST_STM32_USART_40013800_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_PORT_1_NAME		ST_STM32_USART_40013800_LABEL
+#define PORT_1_IRQ				ST_STM32_USART_40013800_IRQ_0
+
+#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS	ST_STM32_USART_40004400_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_2_BAUD_RATE	ST_STM32_USART_40004400_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_2_IRQ_PRI	ST_STM32_USART_40004400_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_PORT_2_NAME		ST_STM32_USART_40004400_LABEL
+#define PORT_2_IRQ				ST_STM32_USART_40004400_IRQ_0
+
+#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS	ST_STM32_USART_40004800_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_3_BAUD_RATE	ST_STM32_USART_40004800_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_3_IRQ_PRI	ST_STM32_USART_40004800_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_PORT_3_NAME		ST_STM32_USART_40004800_LABEL
+#define PORT_3_IRQ				ST_STM32_USART_40004800_IRQ_0
+
+#define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS	ST_STM32_UART_40004C00_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_4_BAUD_RATE	ST_STM32_UART_40004C00_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_4_IRQ_PRI	ST_STM32_UART_40004C00_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_PORT_4_NAME		ST_STM32_UART_40004C00_LABEL
+#define PORT_4_IRQ				ST_STM32_UART_40004C00_IRQ_0
+
+#define CONFIG_UART_STM32_PORT_5_BASE_ADDRESS	ST_STM32_UART_40005000_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_5_BAUD_RATE	ST_STM32_UART_40005000_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_5_IRQ_PRI	ST_STM32_UART_40005000_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_PORT_5_NAME		ST_STM32_UART_40005000_LABEL
+#define PORT_5_IRQ				ST_STM32_UART_40005000_IRQ_0

boards/arm/stm32l476g_disco/pinmux.c

@@ -0,0 +1,27 @@
+#include <kernel.h>
+#include <device.h>
+#include <init.h>
+#include <pinmux.h>
+#include <sys_io.h>
+
+#include <pinmux/stm32/pinmux_stm32.h>
+
+/* pin assignments for STM32L476G DISCOVERY board */
+static const struct pin_config pinconf[] = {
+#ifdef CONFIG_UART_STM32_PORT_2
+	{STM32_PIN_PD5, STM32L4X_PINMUX_FUNC_PD5_USART2_TX},
+	{STM32_PIN_PD6, STM32L4X_PINMUX_FUNC_PD6_USART2_RX},
+#endif	/* CONFIG_UART_STM32_PORT_2 */
+};
+
+static int pinmux_stm32_init(struct device *port)
+{
+	ARG_UNUSED(port);
+
+	stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
+
+	return 0;
+}
+
+SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
+		CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

boards/arm/stm32l476g_disco/stm32l476g_disco.dts

@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2017 Arthur Sfez
+ *
+ * Based on stm32l496g_disco:
+ *
+ * Copyright (c) 2017 Linaro Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/stm32l476.dtsi>
+
+/ {
+	model = "STMicroelectronics STM32L476G-DISCO board";
+	compatible = "st,stm32l476g-disco", "st,stm32l476";
+
+	chosen {
+		zephyr,console = &usart2;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+};
+
+&usart2 {
+	current-speed = <115200>;
+	pinctrl-0 = <&usart2_pins_d>;
+	pinctrl-names = "default";
+	status = "ok";
+};

boards/arm/stm32l476g_disco/stm32l476g_disco.yaml

@@ -0,0 +1,7 @@
+identifier: stm32l476g_disco
+name: STM32L476GDISCOVERY
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gccarmemb

boards/arm/stm32l476g_disco/stm32l476g_disco_defconfig

@@ -0,0 +1,49 @@
+CONFIG_ARM=y
+CONFIG_BOARD_STM32L476G_DISCO=y
+CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_SERIES_STM32L4X=y
+CONFIG_SOC_STM32L476XG=y
+CONFIG_CORTEX_M_SYSTICK=y
+# 80MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
+
+# enable uart driver
+CONFIG_SERIAL=y
+CONFIG_UART_STM32=y
+CONFIG_UART_STM32_PORT_2=y
+
+# enable pinmux
+CONFIG_PINMUX=y
+CONFIG_PINMUX_STM32=y
+
+# enable GPIOs
+CONFIG_GPIO=y
+CONFIG_GPIO_STM32=y
+CONFIG_GPIO_STM32_PORTA=y
+CONFIG_GPIO_STM32_PORTB=y
+CONFIG_GPIO_STM32_PORTC=y
+CONFIG_GPIO_STM32_PORTD=y
+CONFIG_GPIO_STM32_PORTE=y
+CONFIG_GPIO_STM32_PORTF=y
+CONFIG_GPIO_STM32_PORTG=y
+CONFIG_GPIO_STM32_PORTH=y
+
+# clock configuration
+CONFIG_CLOCK_CONTROL=y
+# SYSCLK selection
+CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+# PLL configuration
+CONFIG_CLOCK_STM32_PLL_SRC_HSI
+# produce 80MHz clock at PLL output
+CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
+CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
+CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
+CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
+CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
+CONFIG_CLOCK_STM32_AHB_PRESCALER=1
+CONFIG_CLOCK_STM32_APB1_PRESCALER=1
+CONFIG_CLOCK_STM32_APB2_PRESCALER=1
+
+# console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y

boards/arm/stm32l476g_disco/support/openocd.cfg

@@ -0,0 +1,12 @@
+source [find board/stm32l4discovery.cfg]
+
+$_TARGETNAME configure -event gdb-attach {
+	echo "Debugger attaching: halting execution"
+	reset halt
+	gdb_breakpoint_override hard
+}
+
+$_TARGETNAME configure -event gdb-detach {
+	echo "Debugger detaching: resuming execution"
+	resume
+}

dts/arm/st/stm32l4-pinctrl.dtsi

@@ -45,6 +45,12 @@
 					tx = <STM32_PIN_PA2 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
 				};
 			};
+			usart2_pins_d: usart2@3 {
+				rx_tx {
+					rx = <STM32_PIN_PD6 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
+					tx = <STM32_PIN_PD5 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
+				};
+			};
 			usart3_pins_a: usart3@0 {
 				rx_tx {
 					rx = <STM32_PIN_PB11 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;