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arch: xtensa: add macros for user registers

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This patch adds RUR and WUR macros to read and write user special
registers.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This commit is contained in:
Tomasz Leman 2022-07-13 12:25:15 +02:00 committed by Fabio Baltieri
parent 98e95d1d68
commit ef2ee7ecf2
1 changed files with 10 additions and 0 deletions
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10
include/zephyr/arch/xtensa/arch_inlines.h
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@ -23,6 +23,16 @@
__asm__ volatile ("wsr." sr " %0" : : "r"(v)); \
} while (false)
#define RUR(ur) \
({uint32_t v; \
__asm__ volatile ("rur." ur " %0" : "=a"(v)); \
v; })
#define WUR(ur, v) \
do { \
__asm__ volatile ("wur." ur " %0" : : "r"(v)); \
} while (false)
static ALWAYS_INLINE _cpu_t *arch_curr_cpu(void)
{
_cpu_t *cpu;