doc: release/3.5: add some bits on Xtensa
This adds some bits on added Xtensa MMU support, refactoring of ESP32 folder, and various board additions/removals. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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@ -68,6 +68,8 @@ Architectures
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* Xtensa
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* Added basic MMU v2 Support.
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* POSIX
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* Has been reworked to use the native simulator.
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@ -109,6 +111,7 @@ Boards & SoC Support
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and CONFIG_NXP_IMX_EXTERNAL_SDRAM to enabled.
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* i.MX RT SOCs no longer support CONFIG_OCRAM_NOCACHE, as this functionality
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can be achieved using devicetree memory regions
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* Refactored ESP32 SoC folders. So now these are a proper SoC series.
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* Added support for these ARC boards:
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@ -124,6 +127,19 @@ Boards & SoC Support
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* Added support for these Xtensa boards:
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* Added ``esp32_devkitc_wroom`` and ``esp32_devkitc_wrover``.
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* Added ``esp32s3_luatos_core``.
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* Added ``m5stack_core2``.
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* Added ``qemu_xtensa_mmu`` utilizing Diamond DC233c SoC to support
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testing Xtensa MMU.
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* Added ``xiao_esp32s3``.
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* Added ``yd_esp32``.
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* Added support for these POSIX boards:
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* :ref:`native_sim(_64) <native_sim>`
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@ -142,6 +158,12 @@ Boards & SoC Support
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* Made these changes for Xtensa boards:
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* esp32s3_devkitm:
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* Added USB-CDC support.
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* Added CAN support.
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* Made these changes for POSIX boards:
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* nrf52_bsim:
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@ -161,6 +183,8 @@ Boards & SoC Support
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* Removed support for these Xtensa boards:
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* Removed ``esp32``. Use ``esp32_devkitc_*`` instead.
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* Made these changes in other boards:
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* Added support for these following shields:
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