drivers: serial: add XMC seris UART support
Add infineon XMC4 series UART support. Driver supports only poll mode using XMCLib. Out of 4 available UART's on SoC, only UART1 is confgired by default in UART mode until GPIO & pinctrl support. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
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@ -212,6 +212,7 @@
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/drivers/serial/uart_rtt.c @carlescufi @pkral78
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/drivers/serial/Kconfig.xlnx @wjliang
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/drivers/serial/uart_xlnx_ps.c @wjliang
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/drivers/serial/*xmc4xxx* @parthitce
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/drivers/net/ @jukkar @tbursztyka
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/drivers/ptp_clock/ @jukkar
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/drivers/pwm/*rv32m1* @henrikbrixandersen
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@ -30,6 +30,7 @@ zephyr_library_sources_if_kconfig(uart_rv32m1_lpuart.c)
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zephyr_library_sources_if_kconfig(uart_liteuart.c)
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zephyr_library_sources_ifdef(CONFIG_UART_RTT_DRIVER uart_rtt.c)
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zephyr_library_sources_if_kconfig(uart_xlnx_ps.c)
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zephyr_library_sources_if_kconfig(uart_xmc4xxx.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE uart_handlers.c)
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@ -124,4 +124,6 @@ source "drivers/serial/Kconfig.rtt"
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source "drivers/serial/Kconfig.xlnx"
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source "drivers/serial/Kconfig.xmc4xxx"
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endif # SERIAL
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12
drivers/serial/Kconfig.xmc4xxx
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12
drivers/serial/Kconfig.xmc4xxx
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# Copyright (c) 2020 Linumiz
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#
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# Author: Parthiban Nallathambi <parthiban@linumiz.com>
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# SPDX-License-Identifier: Apache-2.0
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config UART_XMC4XXX
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depends on SOC_SERIES_XMC_4XXX
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bool "XMC4XX UART driver"
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select SERIAL_HAS_DRIVER
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depends on SOC_FAMILY_XMC && HAS_XMCLIB_UART
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help
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This option enables the XMC4XX UART driver, for UART_0.
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82
drivers/serial/uart_xmc4xxx.c
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82
drivers/serial/uart_xmc4xxx.c
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/*
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* Copyright (c) 2020 Linumiz
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* Author: Parthiban Nallathambi <parthiban@linumiz.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT infineon_xmc4xxx_uart
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#include <xmc_gpio.h>
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#include <xmc_uart.h>
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#include <drivers/uart.h>
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struct uart_xmc4xxx_data {
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XMC_UART_CH_CONFIG_t config;
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};
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#define DEV_CFG(dev) \
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((const struct uart_device_config * const)(dev)->config_info)
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#define DEV_DATA(dev) \
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((struct uart_xmc4xxx_data * const)(dev)->driver_data)
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static int uart_xmc4xxx_poll_in(struct device *dev, unsigned char *c)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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*(uint16_t *)c =
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XMC_UART_CH_GetReceivedData((XMC_USIC_CH_t *)config->base);
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return 0;
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}
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static void uart_xmc4xxx_poll_out(struct device *dev, unsigned char c)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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XMC_UART_CH_Transmit((XMC_USIC_CH_t *)config->base, (uint16_t)c);
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}
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static int uart_xmc4xxx_init(struct device *dev)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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struct uart_xmc4xxx_data *data = DEV_DATA(dev);
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XMC_USIC_CH_t *uart = (XMC_USIC_CH_t *)config->base;
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data->config.data_bits = 8U;
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data->config.stop_bits = 1U;
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/* configure PIN 0.0 and 0.1 as UART */
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XMC_UART_CH_Init(uart, &(data->config));
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XMC_GPIO_SetMode(P0_0, XMC_GPIO_MODE_INPUT_TRISTATE);
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XMC_UART_CH_SetInputSource(uart, XMC_UART_CH_INPUT_RXD,
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USIC1_C1_DX0_P0_0);
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XMC_UART_CH_Start(uart);
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XMC_GPIO_SetMode(P0_1,
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XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P0_1_AF_U1C1_DOUT0);
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return 0;
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}
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static const struct uart_driver_api uart_xmc4xxx_driver_api = {
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.poll_in = uart_xmc4xxx_poll_in,
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.poll_out = uart_xmc4xxx_poll_out,
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};
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#define XMC4XXX_INIT(index) \
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static struct uart_xmc4xxx_data xmc4xxx_data_##index = { \
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.config.baudrate = DT_INST_PROP(index, current_speed) \
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}; \
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\
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static const struct uart_device_config xmc4xxx_config_##index = { \
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.base = (void *)DT_INST_REG_ADDR(index), \
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}; \
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\
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DEVICE_AND_API_INIT(uart_xmc4xxx_##index, DT_INST_LABEL(index), \
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&uart_xmc4xxx_init, &xmc4xxx_data_##index, \
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&xmc4xxx_config_##index, PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&uart_xmc4xxx_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(XMC4XXX_INIT)
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9
dts/bindings/serial/infineon,xmc4xxx-uart.yaml
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9
dts/bindings/serial/infineon,xmc4xxx-uart.yaml
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description: INFINEON XMC4XXX UART
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compatible: "infineon,xmc4xxx-uart"
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include: uart-controller.yaml
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properties:
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reg:
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required: true
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@ -12,5 +12,6 @@ config SOC_SERIES_XMC_4XXX
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select SOC_FAMILY_XMC
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select CPU_HAS_ARM_MPU
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select CPU_HAS_FPU
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select HAS_XMCLIB_UART
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help
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Enable support for XMC 4xxx MCU series
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