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soc: arm: st_stm32: add config to allow debugger attach in sleep/stop modes

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Adds CONFIG_STM32_ENABLE_DEBUG_SLEEP_STOP to allow debugger attaching in
sleep/stop mode of STM32 parts. Mainly useful for debugging. Move DBGMCU
from part-sepcific power.c to common soc_config.c. CONFIG_USE_SEGGER_RTT
depends on this as well.

Signed-off-by: Roland Lezuo <roland.lezuo@embedded-solutions.at>
This commit is contained in:
Roland Lezuo 2023-09-14 15:48:43 +02:00 committed by Carles Cufí
parent 47d1dcda4e
commit f4c901b82d
12 changed files with 56 additions and 56 deletions
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1
modules/segger/Kconfig
View file

@ -12,6 +12,7 @@ config HAS_SEGGER_RTT
config USE_SEGGER_RTT
bool "SEGGER RTT libraries."
depends on HAS_SEGGER_RTT
select STM32_ENABLE_DEBUG_SLEEP_STOP if SOC_FAMILY_STM32
help
Enable Segger J-Link RTT libraries for platforms that support it.
Selection of this option enables use of RTT for various subsystems.

10
soc/arm/st_stm32/Kconfig
View file

@ -6,6 +6,7 @@
config SOC_FAMILY_STM32
bool
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
select STM32_ENABLE_DEBUG_SLEEP_STOP if DEBUG
select BUILD_OUTPUT_HEX
if SOC_FAMILY_STM32
@ -14,6 +15,15 @@ config SOC_FAMILY
string
default "st_stm32"
config STM32_ENABLE_DEBUG_SLEEP_STOP
bool "Allow debugger attach in stop/sleep Mode"
help
Some STM32 parts disable the DBGMCU in sleep/stop modes because
of power consumption. As a side-effects this prevents
debuggers from attaching w/o resetting the target. This
effectivly destroys the use-case of `west attach`. Also
SEGGER RTT and similar technologies need this.
source "soc/arm/st_stm32/*/Kconfig.soc"
endif # SOC_FAMILY_STM32

48
soc/arm/st_stm32/common/soc_config.c
View file

@ -60,13 +60,55 @@ static int st_stm32_common_config(void)
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_DBGMCU);
#endif /* LL_APB1_GRP1_PERIPH_DBGMCU */
#endif /* CONFIG_USE_SEGGER_RTT */
#if defined(CONFIG_STM32_ENABLE_DEBUG_SLEEP_STOP)
#if defined(CONFIG_SOC_SERIES_STM32H7X) || defined(CONFIG_SOC_SERIES_STM32MP1X)
HAL_EnableDBGSleepMode();
#else
HAL_EnableDBGStopMode();
#else /* CONFIG_SOC_SERIES_STM32H7X || CONFIG_SOC_SERIES_STM32MP1X */
#if defined(SOC_SERIES_STM32G0X) || defined(SOC_SERIES_STM32C0X)
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DBGMCU);
LL_DBGMCU_EnableDBGStopMode();
LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_DBGMCU);
#elif defined(SOC_SERIES_STM32F0X)
LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_DBGMCU);
LL_DBGMCU_EnableDBGStopMode();
LL_APB1_GRP2_DisableClock(LL_APB1_GRP2_PERIPH_DBGMCU);
#elif defined(SOC_SERIES_STM32L0X)
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_DBGMCU);
LL_DBGMCU_EnableDBGStopMode();
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_DBGMCU);
#else /* all other parts */
LL_DBGMCU_EnableDBGStopMode();
#endif
#endif /* CONFIG_SOC_SERIES_STM32H7X || CONFIG_SOC_SERIES_STM32MP1X */
#endif /* CONFIG_USE_SEGGER_RTT */
#else
/* keeping in mind that debugging draws a lot of power we explcitly disable when not needed */
#if defined(CONFIG_SOC_SERIES_STM32H7X) || defined(CONFIG_SOC_SERIES_STM32MP1X)
HAL_DisableDBGStopMode();
#else /* CONFIG_SOC_SERIES_STM32H7X || CONFIG_SOC_SERIES_STM32MP1X */
#if defined(SOC_SERIES_STM32G0X) || defined(SOC_SERIES_STM32C0X)
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DBGMCU);
LL_DBGMCU_DisableDBGStopMode();
LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_DBGMCU);
#elif defined(SOC_SERIES_STM32F0X)
LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_DBGMCU);
LL_DBGMCU_DisableDBGStopMode();
LL_APB1_GRP2_DisableClock(LL_APB1_GRP2_PERIPH_DBGMCU);
#elif defined(SOC_SERIES_STM32L0X)
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_DBGMCU);
LL_DBGMCU_DisableDBGStopMode();
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_DBGMCU);
#else /* all other parts */
LL_DBGMCU_DisableDBGStopMode();
#endif
#endif /* CONFIG_SOC_SERIES_STM32H7X || CONFIG_SOC_SERIES_STM32MP1X */
#endif /* CONFIG_STM32_ENABLE_DEBUG_SLEEP_STOP */
return 0;
}

7
soc/arm/st_stm32/stm32g0/power.c
View file

@ -87,13 +87,6 @@ static int stm32_power_init(void)
/* enable Power clock */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
#ifdef CONFIG_DEBUG
/* Enable the Debug Module during all and any Low power mode */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DBGMCU);
LL_DBGMCU_EnableDBGStopMode();
LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_DBGMCU);
#endif /* CONFIG_DEBUG */
return 0;
}

7
soc/arm/st_stm32/stm32g4/power.c
View file

@ -85,13 +85,6 @@ static int stm32_power_init(void)
/* enable Power clock */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
/* keep in mind that debugging draws a lot of power */
#ifdef CONFIG_DEBUG
LL_DBGMCU_EnableDBGStopMode();
#else
LL_DBGMCU_DisableDBGStopMode();
#endif
return 0;
}

7
soc/arm/st_stm32/stm32l0/power.c
View file

@ -80,13 +80,6 @@ static int stm32_power_init(void)
/* Enable Power clock */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
#ifdef CONFIG_DEBUG
/* Enable the Debug Module during STOP mode */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_DBGMCU);
LL_DBGMCU_EnableDBGStopMode();
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_DBGMCU);
#endif /* CONFIG_DEBUG */
return 0;
}

5
soc/arm/st_stm32/stm32l4/power.c
View file

@ -120,11 +120,6 @@ static int stm32_power_init(void)
/* enable Power clock */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
#ifdef CONFIG_DEBUG
/* Enable the Debug Module during STOP mode */
LL_DBGMCU_EnableDBGStopMode();
#endif /* CONFIG_DEBUG */
return 0;
}

5
soc/arm/st_stm32/stm32l5/power.c
View file

@ -104,11 +104,6 @@ static int stm32_power_init(void)
/* enable Power clock */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
#ifdef CONFIG_DEBUG
/* Enable the Debug Module during all and any Low power mode */
LL_DBGMCU_EnableDBGStopMode();
#endif /* CONFIG_DEBUG */
return 0;
}

5
soc/arm/st_stm32/stm32u5/power.c
View file

@ -118,11 +118,6 @@ static int stm32_power_init(void)
/* enable Power clock */
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_PWR);
#ifdef CONFIG_DEBUG
/* Enable the Debug Module during all and any Low power mode */
LL_DBGMCU_EnableDBGStopMode();
#endif /* CONFIG_DEBUG */
return 0;
}

6
soc/arm/st_stm32/stm32wb/power.c
View file

@ -141,12 +141,6 @@ void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
/* Initialize STM32 Power */
static int stm32_power_init(void)
{
#ifdef CONFIG_DEBUG
/* Enable the Debug Module during STOP mode */
LL_DBGMCU_EnableDBGStopMode();
#endif /* CONFIG_DEBUG */
return 0;
}

5
soc/arm/st_stm32/stm32wba/power.c
View file

@ -104,11 +104,6 @@ static int stm32_power_init(void)
/* enable Power clock */
LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_PWR);
#ifdef CONFIG_DEBUG
/* Enable the Debug Module during all and any Low power mode */
LL_DBGMCU_EnableDBGStopMode();
#endif /* CONFIG_DEBUG */
return 0;
}

6
soc/arm/st_stm32/stm32wl/power.c
View file

@ -85,12 +85,6 @@ void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
/* Initialize STM32 Power */
static int stm32_power_init(void)
{
#ifdef CONFIG_DEBUG
/* Enable the Debug Module during STOP mode */
LL_DBGMCU_EnableDBGStopMode();
#endif /* CONFIG_DEBUG */
return 0;
}