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boards: xtensa: esp32s2_saola: dts: use pin grouping

Browse source 
Updates device tree pin states definitions and node
descriptions to group pins sharing common properties.

Accordingly, updates in-tree overlays as well.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This commit is contained in:
Glauber Maroto Ferreira 2022-05-18 11:33:10 -03:00 committed by Fabio Baltieri
parent bebfaa04aa
commit f82d3d444d
3 changed files with 55 additions and 72 deletions
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105
boards/xtensa/esp32s2_saola/esp32s2_saola-pinctrl.dtsi
View file

@ -10,75 +10,58 @@
&pinctrl {
uart0_tx_gpio43: uart0_tx_gpio43 {
pinmux = <UART0_TX_GPIO43>;
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_GPIO43>;
};
group2 {
pinmux = <UART0_RX_GPIO44>;
bias-pull-up;
};
};
uart0_rx_gpio44: uart0_rx_gpio44 {
pinmux = <UART0_RX_GPIO44>;
bias-pull-up;
spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_MISO_GPIO13>,
<SPIM2_SCLK_GPIO12>,
<SPIM2_CSEL_GPIO10>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO11>;
output-low;
};
};
spim2_miso_gpio13: spim2_miso_gpio13 {
pinmux = <SPIM2_MISO_GPIO13>;
spim3_default: spim3_default {
group1 {
pinmux = <SPIM3_MISO_GPIO37>,
<SPIM3_SCLK_GPIO36>,
<SPIM3_CSEL_GPIO34>;
};
group2 {
pinmux = <SPIM3_MOSI_GPIO35>;
output-low;
};
};
spim2_mosi_gpio11: spim2_mosi_gpio11 {
pinmux = <SPIM2_MOSI_GPIO11>;
output-low;
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO8>,
<I2C0_SCL_GPIO9>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
spim2_sclk_gpio12: spim2_sclk_gpio12 {
pinmux = <SPIM2_SCLK_GPIO12>;
};
spim2_csel_gpio10: spim2_csel_gpio10 {
pinmux = <SPIM2_CSEL_GPIO10>;
};
spim3_miso_gpio37: spim3_miso_gpio37 {
pinmux = <SPIM3_MISO_GPIO37>;
};
spim3_mosi_gpio35: spim3_mosi_gpio35 {
pinmux = <SPIM3_MOSI_GPIO35>;
output-low;
};
spim3_sclk_gpio36: spim3_sclk_gpio36 {
pinmux = <SPIM3_SCLK_GPIO36>;
};
spim3_csel_gpio34: spim3_csel_gpio34 {
pinmux = <SPIM3_CSEL_GPIO34>;
};
i2c0_sda_gpio8: i2c0_sda_gpio8 {
pinmux = <I2C0_SDA_GPIO8>;
bias-pull-up;
drive-open-drain;
output-high;
};
i2c0_scl_gpio9: i2c0_scl_gpio9 {
pinmux = <I2C0_SCL_GPIO9>;
bias-pull-up;
drive-open-drain;
output-high;
};
i2c1_sda_gpio3: i2c1_sda_gpio3 {
pinmux = <I2C1_SDA_GPIO3>;
bias-pull-up;
drive-open-drain;
output-high;
};
i2c1_scl_gpio4: i2c1_scl_gpio4 {
pinmux = <I2C1_SCL_GPIO4>;
bias-pull-up;
drive-open-drain;
output-high;
i2c1_default: i2c1_default {
group1 {
pinmux = <I2C1_SDA_GPIO3>,
<I2C1_SCL_GPIO4>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
};

12
boards/xtensa/esp32s2_saola/esp32s2_saola.dts
View file

@ -32,7 +32,7 @@
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_tx_gpio43 &uart0_rx_gpio44>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
@ -63,13 +63,13 @@
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c0_sda_gpio8 &i2c0_scl_gpio9>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
&i2c1 {
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c1_sda_gpio3 &i2c1_scl_gpio4>;
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
};
@ -81,8 +81,7 @@
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim2_miso_gpio13 &spim2_mosi_gpio11
&spim2_sclk_gpio12 &spim2_csel_gpio10>;
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
};
@ -90,8 +89,7 @@
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim3_miso_gpio37 &spim3_mosi_gpio35
&spim3_sclk_gpio36 &spim3_csel_gpio34>;
pinctrl-0 = <&spim3_default>;
pinctrl-names = "default";
};

10
samples/basic/blinky_pwm/boards/esp32s2_saola.overlay
View file

@ -24,14 +24,16 @@
};
&pinctrl {
ledc0_ch0_gpio2: ledc0_ch0_gpio2 {
pinmux = <LEDC_CH0_GPIO2>;
output-enable;
ledc0_default: ledc0_default {
group1 {
pinmux = <LEDC_CH0_GPIO2>;
output-enable;
};
};
};
&ledc0 {
pinctrl-0 = <&ledc0_ch0_gpio2>;
pinctrl-0 = <&ledc0_default>;
pinctrl-names = "default";
status = "okay";
#address-cells = <1>;