From f93e37e84b29464d4dfbfa0ad1860f26f557b97c Mon Sep 17 00:00:00 2001 From: Mahesh Mahadevan Date: Tue, 5 Mar 2024 16:45:15 -0600 Subject: [PATCH] soc: mcxn947: Add support for NXP MCXN947 Add initial support for NXP MCXN947 SoC Signed-off-by: Emilio Benavente Signed-off-by: Mahesh Mahadevan --- MAINTAINERS.yml | 1 + modules/Kconfig.mcux | 5 ++- soc/nxp/mcx/CMakeLists.txt | 7 ++++ soc/nxp/mcx/Kconfig | 13 ++++++++ soc/nxp/mcx/Kconfig.defconfig | 12 +++++++ soc/nxp/mcx/Kconfig.soc | 10 ++++++ soc/nxp/mcx/mcxnx4x/CMakeLists.txt | 17 ++++++++++ soc/nxp/mcx/mcxnx4x/Kconfig | 38 ++++++++++++++++++++++ soc/nxp/mcx/mcxnx4x/Kconfig.defconfig | 46 +++++++++++++++++++++++++++ soc/nxp/mcx/mcxnx4x/Kconfig.soc | 34 ++++++++++++++++++++ soc/nxp/mcx/mcxnx4x/pinctrl_soc.h | 46 +++++++++++++++++++++++++++ soc/nxp/mcx/mcxnx4x/soc.c | 40 +++++++++++++++++++++++ soc/nxp/mcx/mcxnx4x/soc.h | 27 ++++++++++++++++ soc/nxp/mcx/soc.yml | 9 ++++++ 14 files changed, 304 insertions(+), 1 deletion(-) create mode 100644 soc/nxp/mcx/CMakeLists.txt create mode 100644 soc/nxp/mcx/Kconfig create mode 100644 soc/nxp/mcx/Kconfig.defconfig create mode 100644 soc/nxp/mcx/Kconfig.soc create mode 100644 soc/nxp/mcx/mcxnx4x/CMakeLists.txt create mode 100644 soc/nxp/mcx/mcxnx4x/Kconfig create mode 100644 soc/nxp/mcx/mcxnx4x/Kconfig.defconfig create mode 100644 soc/nxp/mcx/mcxnx4x/Kconfig.soc create mode 100644 soc/nxp/mcx/mcxnx4x/pinctrl_soc.h create mode 100644 soc/nxp/mcx/mcxnx4x/soc.c create mode 100644 soc/nxp/mcx/mcxnx4x/soc.h create mode 100644 soc/nxp/mcx/soc.yml diff --git a/MAINTAINERS.yml b/MAINTAINERS.yml index 7e7548928b..b61853be4e 100644 --- a/MAINTAINERS.yml +++ b/MAINTAINERS.yml @@ -3334,6 +3334,7 @@ NXP Platforms (MCU): - soc/nxp/kinetis/ - soc/nxp/lpc/ - soc/nxp/rw/ + - soc/nxp/mcx/ - dts/arm/nxp/ - samples/boards/nxp*/ files-regex-exclude: diff --git a/modules/Kconfig.mcux b/modules/Kconfig.mcux index c1760ffd64..3f20250f58 100644 --- a/modules/Kconfig.mcux +++ b/modules/Kconfig.mcux @@ -1,12 +1,15 @@ # MCUXpresso SDK # Copyright (c) 2016, Freescale Semiconductor, Inc. +# Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 config HAS_MCUX bool depends on SOC_FAMILY_KINETIS || SOC_FAMILY_NXP_IMX || SOC_FAMILY_LPC || \ - SOC_FAMILY_NXP_S32 || SOC_FAMILY_NXP_IMXRT || SOC_FAMILY_NXP_RW + SOC_FAMILY_NXP_S32 || SOC_FAMILY_NXP_IMXRT || SOC_FAMILY_NXP_RW || \ + SOC_FAMILY_NXP_MCX + if HAS_MCUX config MCUX_CORE_SUFFIX diff --git a/soc/nxp/mcx/CMakeLists.txt b/soc/nxp/mcx/CMakeLists.txt new file mode 100644 index 0000000000..025698dfbc --- /dev/null +++ b/soc/nxp/mcx/CMakeLists.txt @@ -0,0 +1,7 @@ +# +# Copyright 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +add_subdirectory(${SOC_SERIES}) diff --git a/soc/nxp/mcx/Kconfig b/soc/nxp/mcx/Kconfig new file mode 100644 index 0000000000..b8ac7a08f1 --- /dev/null +++ b/soc/nxp/mcx/Kconfig @@ -0,0 +1,13 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +config SOC_FAMILY_NXP_MCX + select HAS_SEGGER_RTT + select CLOCK_CONTROL + select ARM + +if SOC_FAMILY_NXP_MCX + +rsource "*/Kconfig" + +endif # SOC_FAMILY_NXP_MCX diff --git a/soc/nxp/mcx/Kconfig.defconfig b/soc/nxp/mcx/Kconfig.defconfig new file mode 100644 index 0000000000..9e41c34f19 --- /dev/null +++ b/soc/nxp/mcx/Kconfig.defconfig @@ -0,0 +1,12 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if SOC_FAMILY_NXP_MCX + +config SERIAL_INIT_PRIORITY + default 55 + depends on SERIAL + +rsource "*/Kconfig.defconfig" + +endif # SOC_FAMILY_NXP_MCX diff --git a/soc/nxp/mcx/Kconfig.soc b/soc/nxp/mcx/Kconfig.soc new file mode 100644 index 0000000000..d69ee818fa --- /dev/null +++ b/soc/nxp/mcx/Kconfig.soc @@ -0,0 +1,10 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +config SOC_FAMILY_NXP_MCX + bool + +config SOC_FAMILY + default "nxp_mcx" if SOC_FAMILY_NXP_MCX + +rsource "*/Kconfig.soc" diff --git a/soc/nxp/mcx/mcxnx4x/CMakeLists.txt b/soc/nxp/mcx/mcxnx4x/CMakeLists.txt new file mode 100644 index 0000000000..0a382670bc --- /dev/null +++ b/soc/nxp/mcx/mcxnx4x/CMakeLists.txt @@ -0,0 +1,17 @@ +# +# Copyright 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +# Pass this flag so the SDK I2C, UART and SPI drivers do not init the LP +# Flexcomm SDK driver +zephyr_compile_definitions_ifdef(CONFIG_NXP_LP_FLEXCOMM LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER=1) + +zephyr_sources( + soc.c + ) + +zephyr_include_directories(.) + +set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "") diff --git a/soc/nxp/mcx/mcxnx4x/Kconfig b/soc/nxp/mcx/mcxnx4x/Kconfig new file mode 100644 index 0000000000..c36f8b0b00 --- /dev/null +++ b/soc/nxp/mcx/mcxnx4x/Kconfig @@ -0,0 +1,38 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_MCXNX4X + select HAS_MCUX + select HAS_MCUX_FLEXCOMM + select CPU_CORTEX_M_HAS_SYSTICK + select CPU_CORTEX_M_HAS_DWT + select PLATFORM_SPECIFIC_INIT + +config SOC_MCXN947_CPU0 + select CPU_CORTEX_M33 + select CPU_HAS_ARM_SAU + select CPU_HAS_ARM_MPU + select CPU_HAS_FPU + select ARMV8_M_DSP + select ARM_TRUSTZONE_M + select HAS_MCUX_CACHE + +if SOC_SERIES_MCXNX4X + +config SECOND_CORE_MCUX + bool "MCXN94X's second core" + depends on HAS_MCUX + help + Indicates the second core will be enabled, and the part will run + in dual core mode. + +config FLASH_DISABLE_CACHE64 + bool "Disable the CACHE64 cache for FlexSPI flash accesses" + help + Disable cache64 cache. + +config MCUX_CORE_SUFFIX + default "_cm33_core0" if SOC_MCXN947_CPU0 + default "_cm33_core1" if SOC_MCXN947_CPU1 + +endif # SOC_SERIES_MCXNX4X diff --git a/soc/nxp/mcx/mcxnx4x/Kconfig.defconfig b/soc/nxp/mcx/mcxnx4x/Kconfig.defconfig new file mode 100644 index 0000000000..0c64fdaa64 --- /dev/null +++ b/soc/nxp/mcx/mcxnx4x/Kconfig.defconfig @@ -0,0 +1,46 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_MCXNX4X + +config NUM_IRQS + default 155 + +config ROM_START_OFFSET + default 0x400 if BOOTLOADER_MCUBOOT + +config ZTEST_NO_YIELD + default y if (PM && ZTEST) + +DT_CHOSEN_Z_FLASH := zephyr,flash +DT_COMPAT_FLEXSPI := nxp,imx-flexspi + +DT_CHOSEN_FLASH_NODE := $(dt_chosen_path,$(DT_CHOSEN_Z_FLASH)) +DT_CHOSEN_FLASH_PARENT := $(dt_node_parent,$(DT_CHOSEN_FLASH_NODE)) + +DT_FLASH_PARENT_IS_FLEXSPI := $(dt_node_has_compat,$(DT_CHOSEN_FLASH_PARENT),$(DT_COMPAT_FLEXSPI)) +DT_FLASH_HAS_SIZE_PROP := $(dt_node_has_prop,$(DT_CHOSEN_FLASH_NODE),size) + +config FLASH_BASE_ADDRESS + default $(dt_node_reg_addr_hex,$(DT_CHOSEN_FLASH_PARENT),1) \ + if $(DT_FLASH_PARENT_IS_FLEXSPI) + +config FLASH_SIZE + default $(dt_node_int_prop_int,$(DT_CHOSEN_FLASH_NODE),size,Kb) \ + if $(DT_FLASH_HAS_SIZE_PROP) + +if MCUX_OS_TIMER + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 1000000 + +endif # MCUX_OS_TIMER + +if CORTEX_M_SYSTICK + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 150000000 + +endif # CORTEX_M_SYSTICK + +endif # SOC_SERIES_MCXNX4X diff --git a/soc/nxp/mcx/mcxnx4x/Kconfig.soc b/soc/nxp/mcx/mcxnx4x/Kconfig.soc new file mode 100644 index 0000000000..460d3632a2 --- /dev/null +++ b/soc/nxp/mcx/mcxnx4x/Kconfig.soc @@ -0,0 +1,34 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_MCXNX4X + bool + select SOC_FAMILY_NXP_MCX + +config SOC_SERIES + default "mcxnx4x" if SOC_SERIES_MCXNX4X + +config SOC_MCXN947 + bool + select SOC_SERIES_MCXNX4X + +config SOC_MCXN947_CPU0 + bool + select SOC_MCXN947 + +config SOC_MCXN947_CPU1 + bool + select SOC_MCXN947 + +config SOC + default "mcxn947" if SOC_MCXN947 + +config SOC_PART_NUMBER_MCXN947VDF + bool + +config SOC_PART_NUMBER_MCXN947VNL + bool + +config SOC_PART_NUMBER + default "MCXN947VDF" if SOC_PART_NUMBER_MCXN947VDF + default "MCXN947VNL" if SOC_PART_NUMBER_MCXN947VNL diff --git a/soc/nxp/mcx/mcxnx4x/pinctrl_soc.h b/soc/nxp/mcx/mcxnx4x/pinctrl_soc.h new file mode 100644 index 0000000000..4869fb5818 --- /dev/null +++ b/soc/nxp/mcx/mcxnx4x/pinctrl_soc.h @@ -0,0 +1,46 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_SOC_ARM_NXP_MCX_COMMON_PINCTRL_SOC_H_ +#define ZEPHYR_SOC_ARM_NXP_MCX_COMMON_PINCTRL_SOC_H_ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +typedef uint32_t pinctrl_soc_pin_t; + +#define Z_PINCTRL_MCX_PINCFG(node_id) \ + (PORT_PCR_DSE(DT_ENUM_IDX(node_id, drive_strength)) | \ + PORT_PCR_PS(DT_PROP(node_id, bias_pull_up)) | \ + PORT_PCR_PE(DT_PROP(node_id, bias_pull_up)) | \ + PORT_PCR_PE(DT_PROP(node_id, bias_pull_down)) | \ + PORT_PCR_ODE(DT_PROP(node_id, drive_open_drain)) | \ + PORT_PCR_SRE(DT_ENUM_IDX(node_id, slew_rate)) | \ + PORT_PCR_IBE(DT_PROP(node_id, input_enable)) | \ + PORT_PCR_PFE(DT_PROP(node_id, nxp_passive_filter))) + +#define Z_PINCTRL_KINETIS_PCR_MASK \ + (PORT_PCR_IBE_MASK | PORT_PCR_MUX_MASK | PORT_PCR_DSE_MASK | \ + PORT_PCR_ODE_MASK | PORT_PCR_PFE_MASK | PORT_PCR_SRE_MASK | \ + PORT_PCR_PE_MASK | PORT_PCR_PS_MASK) + + +#define Z_PINCTRL_STATE_PIN_INIT(group, pin_prop, idx) \ + DT_PROP_BY_IDX(group, pin_prop, idx) | Z_PINCTRL_MCX_PINCFG(group), + +#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ + {DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \ + DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_STATE_PIN_INIT)}; + +#ifdef __cplusplus +} +#endif + +#endif /* ZEPHYR_SOC_ARM_NXP_MCX_COMMON_PINCTRL_SOC_H_ */ diff --git a/soc/nxp/mcx/mcxnx4x/soc.c b/soc/nxp/mcx/mcxnx4x/soc.c new file mode 100644 index 0000000000..784721b285 --- /dev/null +++ b/soc/nxp/mcx/mcxnx4x/soc.c @@ -0,0 +1,40 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief System/hardware module for nxp_mcxn94x platform + * + * This module provides routines to initialize and support board-level + * hardware for the nxp_mcxn94x platform. + */ + +#include +#include +#include +#include + +#ifdef CONFIG_PLATFORM_SPECIFIC_INIT + +void z_arm_platform_init(void) +{ + SystemInit(); +} + +#endif + +#define FLEXCOMM_CHECK_2(n) \ + BUILD_ASSERT((DT_NODE_HAS_COMPAT(n, nxp_kinetis_lpuart) == 0) && \ + (DT_NODE_HAS_COMPAT(n, nxp_imx_lpi2c) == 0), \ + "Do not enable SPI and UART/I2C on the same Flexcomm node"); + +/* For SPI node enabled, check if UART or I2C is also enabled on the same parent Flexcomm node */ +#define FLEXCOMM_CHECK(n) DT_FOREACH_CHILD_STATUS_OKAY(DT_PARENT(n), FLEXCOMM_CHECK_2) + +/* SPI cannot be exist with UART or I2C on the same FlexComm Interface + * Throw a build error if user is enabling SPI and UART/I2C on a Flexcomm node. + */ +DT_FOREACH_STATUS_OKAY(nxp_imx_lpspi, FLEXCOMM_CHECK) diff --git a/soc/nxp/mcx/mcxnx4x/soc.h b/soc/nxp/mcx/mcxnx4x/soc.h new file mode 100644 index 0000000000..185b400f77 --- /dev/null +++ b/soc/nxp/mcx/mcxnx4x/soc.h @@ -0,0 +1,27 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef _SOC__H_ +#define _SOC__H_ + +#ifndef _ASMLANGUAGE + +#include +#include + +#define PORT_MUX_GPIO kPORT_MuxAlt0 /* GPIO setting for the Port Mux Register */ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* !_ASMLANGUAGE */ + +#endif /* _SOC__H_ */ diff --git a/soc/nxp/mcx/soc.yml b/soc/nxp/mcx/soc.yml new file mode 100644 index 0000000000..8181b0069b --- /dev/null +++ b/soc/nxp/mcx/soc.yml @@ -0,0 +1,9 @@ +family: +- name: nxp_mcx + series: + - name: mcxnx4x + socs: + - name: mcxn947 + cpuclusters: + - name: cpu0 + - name: cpu1