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ieee802154: cc2529: convert to _dt_spec

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Convert cc2529 driver to `spi_dt_spec` and `gpio_dt_spec`. Required a
whole driver conversion from passing around the driver data struct to
passing around the driver itself.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit is contained in:
Jordan Yates 2021-08-06 21:54:22 +10:00 committed by Anas Nashif
parent eecb6cdaf3
commit fab00d086e
2 changed files with 244 additions and 353 deletions
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456
drivers/ieee802154/ieee802154_cc2520.c
View file

@ -59,10 +59,6 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME);
#define CC2520_TX_THRESHOLD (0x7F)
#define CC2520_FCS_LENGTH (2)
#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
static struct spi_cs_control cs_ctrl;
#endif
/*********
* DEBUG *
********/
@ -72,16 +68,16 @@ static inline void cc2520_print_gpio_config(const struct device *dev)
struct cc2520_context *cc2520 = dev->data;
LOG_DBG("GPIOCTRL0/1/2/3/4/5 = 0x%x/0x%x/0x%x/0x%x/0x%x/0x%x",
read_reg_gpioctrl0(cc2520),
read_reg_gpioctrl1(cc2520),
read_reg_gpioctrl2(cc2520),
read_reg_gpioctrl3(cc2520),
read_reg_gpioctrl4(cc2520),
read_reg_gpioctrl5(cc2520));
read_reg_gpioctrl0(cc2520),
read_reg_gpioctrl1(cc2520),
read_reg_gpioctrl2(cc2520),
read_reg_gpioctrl3(cc2520),
read_reg_gpioctrl4(cc2520),
read_reg_gpioctrl5(cc2520));
LOG_DBG("GPIOPOLARITY: 0x%x",
read_reg_gpiopolarity(cc2520));
read_reg_gpiopolarity(cc2520));
LOG_DBG("GPIOCTRL: 0x%x",
read_reg_gpioctrl(cc2520));
read_reg_gpioctrl(cc2520));
}
static inline void cc2520_print_exceptions(struct cc2520_context *cc2520)
@ -205,9 +201,10 @@ static inline void cc2520_print_errors(struct cc2520_context *cc2520)
********************/
#define z_usleep(usec) k_busy_wait(usec)
bool z_cc2520_access(struct cc2520_context *ctx, bool read, uint8_t ins,
uint16_t addr, void *data, size_t length)
bool z_cc2520_access(const struct device *dev, bool read, uint8_t ins,
uint16_t addr, void *data, size_t length)
{
const struct cc2520_config *cfg = dev->config;
uint8_t cmd_buf[2];
struct spi_buf buf[2] = {
{
@ -243,32 +240,32 @@ bool z_cc2520_access(struct cc2520_context *ctx, bool read, uint8_t ins,
tx.count = 1;
return (spi_transceive(ctx->spi, &ctx->spi_cfg, &tx, &rx) == 0);
return (spi_transceive_dt(&cfg->bus, &tx, &rx) == 0);
}
tx.count = data ? 2 : 1;
return (spi_write(ctx->spi, &ctx->spi_cfg, &tx) == 0);
return (spi_write_dt(&cfg->bus, &tx) == 0);
}
static inline uint8_t cc2520_status(struct cc2520_context *ctx)
static inline uint8_t cc2520_status(const struct device *dev)
{
uint8_t status;
if (z_cc2520_access(ctx, true, CC2520_INS_SNOP, 0, &status, 1)) {
if (z_cc2520_access(dev, true, CC2520_INS_SNOP, 0, &status, 1)) {
return status;
}
return 0;
}
static bool verify_osc_stabilization(struct cc2520_context *cc2520)
static bool verify_osc_stabilization(const struct device *dev)
{
uint8_t timeout = 100U;
uint8_t status;
do {
status = cc2520_status(cc2520);
status = cc2520_status(dev);
z_usleep(1);
timeout--;
} while (!(status & CC2520_STATUS_XOSC_STABLE_N_RUNNING) && timeout);
@ -304,13 +301,11 @@ static inline uint8_t *get_mac(const struct device *dev)
static int cc2520_set_pan_id(const struct device *dev, uint16_t pan_id)
{
struct cc2520_context *cc2520 = dev->data;
LOG_DBG("0x%x", pan_id);
pan_id = sys_le16_to_cpu(pan_id);
if (!write_mem_pan_id(cc2520, (uint8_t *) &pan_id)) {
if (!write_mem_pan_id(dev, (uint8_t *) &pan_id)) {
LOG_ERR("Failed");
return -EIO;
}
@ -321,13 +316,11 @@ static int cc2520_set_pan_id(const struct device *dev, uint16_t pan_id)
static int cc2520_set_short_addr(const struct device *dev,
uint16_t short_addr)
{
struct cc2520_context *cc2520 = dev->data;
LOG_DBG("0x%x", short_addr);
short_addr = sys_le16_to_cpu(short_addr);
if (!write_mem_short_addr(cc2520, (uint8_t *) &short_addr)) {
if (!write_mem_short_addr(dev, (uint8_t *) &short_addr)) {
LOG_ERR("Failed");
return -EIO;
}
@ -338,16 +331,14 @@ static int cc2520_set_short_addr(const struct device *dev,
static int cc2520_set_ieee_addr(const struct device *dev,
const uint8_t *ieee_addr)
{
struct cc2520_context *cc2520 = dev->data;
if (!write_mem_ext_addr(cc2520, (void *)ieee_addr)) {
if (!write_mem_ext_addr(dev, (void *)ieee_addr)) {
LOG_ERR("Failed");
return -EIO;
}
LOG_DBG("IEEE address %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
ieee_addr[7], ieee_addr[6], ieee_addr[5], ieee_addr[4],
ieee_addr[3], ieee_addr[2], ieee_addr[1], ieee_addr[0]);
ieee_addr[7], ieee_addr[6], ieee_addr[5], ieee_addr[4],
ieee_addr[3], ieee_addr[2], ieee_addr[1], ieee_addr[0]);
return 0;
}
@ -357,48 +348,37 @@ static int cc2520_set_ieee_addr(const struct device *dev,
*****************/
static inline void set_reset(const struct device *dev, uint32_t value)
{
struct cc2520_context *cc2520 = dev->data;
const struct cc2520_config *cfg = dev->config;
gpio_pin_set_raw(cc2520->gpios[CC2520_GPIO_IDX_RESET].dev,
cc2520->gpios[CC2520_GPIO_IDX_RESET].pin, value);
gpio_pin_set_raw(cfg->reset.port, cfg->reset.pin, value);
}
static inline void set_vreg_en(const struct device *dev, uint32_t value)
{
struct cc2520_context *cc2520 = dev->data;
const struct cc2520_config *cfg = dev->config;
gpio_pin_set_raw(cc2520->gpios[CC2520_GPIO_IDX_VREG_EN].dev,
cc2520->gpios[CC2520_GPIO_IDX_VREG_EN].pin, value);
gpio_pin_set_raw(cfg->vreg_en.port, cfg->vreg_en.pin, value);
}
static inline uint32_t get_fifo(struct cc2520_context *cc2520)
static inline uint32_t get_fifo(const struct device *dev)
{
uint32_t pin_value;
const struct cc2520_config *cfg = dev->config;
pin_value = gpio_pin_get_raw(cc2520->gpios[CC2520_GPIO_IDX_FIFO].dev,
cc2520->gpios[CC2520_GPIO_IDX_FIFO].pin);
return pin_value;
return gpio_pin_get_raw(cfg->fifo.port, cfg->fifo.pin);
}
static inline uint32_t get_fifop(struct cc2520_context *cc2520)
static inline uint32_t get_fifop(const struct device *dev)
{
uint32_t pin_value;
const struct cc2520_config *cfg = dev->config;
pin_value = gpio_pin_get_raw(cc2520->gpios[CC2520_GPIO_IDX_FIFOP].dev,
cc2520->gpios[CC2520_GPIO_IDX_FIFOP].pin);
return pin_value;
return gpio_pin_get_raw(cfg->fifop.port, cfg->fifop.pin);
}
static inline uint32_t get_cca(struct cc2520_context *cc2520)
static inline uint32_t get_cca(const struct device *dev)
{
uint32_t pin_value;
const struct cc2520_config *cfg = dev->config;
pin_value = gpio_pin_get_raw(cc2520->gpios[CC2520_GPIO_IDX_CCA].dev,
cc2520->gpios[CC2520_GPIO_IDX_CCA].pin);
return pin_value;
return gpio_pin_get_raw(cfg->cca.port, cfg->cca.pin);
}
static inline void sfd_int_handler(const struct device *port,
@ -420,79 +400,76 @@ static inline void fifop_int_handler(const struct device *port,
CONTAINER_OF(cb, struct cc2520_context, fifop_cb);
/* Note: Errata document - 1.2 */
if (!get_fifop(cc2520) && !get_fifop(cc2520)) {
if (!get_fifop(cc2520->dev) && !get_fifop(cc2520->dev)) {
return;
}
if (!get_fifo(cc2520)) {
if (!get_fifo(cc2520->dev)) {
cc2520->overflow = true;
}
k_sem_give(&cc2520->rx_lock);
}
static void enable_fifop_interrupt(struct cc2520_context *cc2520,
static void enable_fifop_interrupt(const struct device *dev,
bool enable)
{
gpio_pin_interrupt_configure(
cc2520->gpios[CC2520_GPIO_IDX_FIFOP].dev,
cc2520->gpios[CC2520_GPIO_IDX_FIFOP].pin,
enable ? GPIO_INT_EDGE_TO_ACTIVE : GPIO_INT_DISABLE);
const struct cc2520_config *cfg = dev->config;
gpio_flags_t mode = enable ? GPIO_INT_EDGE_TO_ACTIVE : GPIO_INT_DISABLE;
gpio_pin_interrupt_configure_dt(&cfg->fifop, mode);
}
static void enable_sfd_interrupt(struct cc2520_context *cc2520,
static void enable_sfd_interrupt(const struct device *dev,
bool enable)
{
gpio_pin_interrupt_configure(
cc2520->gpios[CC2520_GPIO_IDX_SFD].dev,
cc2520->gpios[CC2520_GPIO_IDX_SFD].pin,
enable ? GPIO_INT_EDGE_TO_ACTIVE : GPIO_INT_DISABLE);
const struct cc2520_config *cfg = dev->config;
gpio_flags_t mode = enable ? GPIO_INT_EDGE_TO_ACTIVE : GPIO_INT_DISABLE;
gpio_pin_interrupt_configure_dt(&cfg->sfd, mode);
}
static inline void setup_gpio_callbacks(const struct device *dev)
{
const struct cc2520_config *cfg = dev->config;
struct cc2520_context *cc2520 = dev->data;
gpio_init_callback(&cc2520->sfd_cb, sfd_int_handler,
BIT(cc2520->gpios[CC2520_GPIO_IDX_SFD].pin));
gpio_add_callback(cc2520->gpios[CC2520_GPIO_IDX_SFD].dev,
&cc2520->sfd_cb);
gpio_init_callback(&cc2520->sfd_cb, sfd_int_handler, BIT(cfg->sfd.pin));
gpio_add_callback(cfg->sfd.port, &cc2520->sfd_cb);
gpio_init_callback(&cc2520->fifop_cb, fifop_int_handler,
BIT(cc2520->gpios[CC2520_GPIO_IDX_FIFOP].pin));
gpio_add_callback(cc2520->gpios[CC2520_GPIO_IDX_FIFOP].dev,
&cc2520->fifop_cb);
gpio_init_callback(&cc2520->fifop_cb, fifop_int_handler, BIT(cfg->fifop.pin));
gpio_add_callback(cfg->fifop.port, &cc2520->fifop_cb);
}
/****************
* TX functions *
***************/
static inline bool write_txfifo_length(struct cc2520_context *ctx, uint8_t len)
static inline bool write_txfifo_length(const struct device *dev, uint8_t len)
{
uint8_t length = len + CC2520_FCS_LENGTH;
return z_cc2520_access(ctx, false, CC2520_INS_TXBUF, 0, &length, 1);
return z_cc2520_access(dev, false, CC2520_INS_TXBUF, 0, &length, 1);
}
static inline bool write_txfifo_content(struct cc2520_context *ctx,
static inline bool write_txfifo_content(const struct device *dev,
uint8_t *frame, uint8_t len)
{
return z_cc2520_access(ctx, false, CC2520_INS_TXBUF, 0, frame, len);
return z_cc2520_access(dev, false, CC2520_INS_TXBUF, 0, frame, len);
}
static inline bool verify_txfifo_status(struct cc2520_context *cc2520,
static inline bool verify_txfifo_status(const struct device *dev,
uint8_t len)
{
if (read_reg_txfifocnt(cc2520) < len ||
(read_reg_excflag0(cc2520) & EXCFLAG0_TX_UNDERFLOW)) {
if (read_reg_txfifocnt(dev) < len ||
(read_reg_excflag0(dev) & EXCFLAG0_TX_UNDERFLOW)) {
return false;
}
return true;
}
static inline bool verify_tx_done(struct cc2520_context *cc2520)
static inline bool verify_tx_done(const struct device *dev)
{
uint8_t timeout = 10U;
uint8_t status;
@ -500,7 +477,7 @@ static inline bool verify_tx_done(struct cc2520_context *cc2520)
do {
z_usleep(1);
timeout--;
status = read_reg_excflag0(cc2520);
status = read_reg_excflag0(dev);
} while (!(status & EXCFLAG0_TX_FRM_DONE) && timeout);
return !!(status & EXCFLAG0_TX_FRM_DONE);
@ -510,39 +487,39 @@ static inline bool verify_tx_done(struct cc2520_context *cc2520)
* RX functions *
***************/
static inline void flush_rxfifo(struct cc2520_context *cc2520)
static inline void flush_rxfifo(const struct device *dev)
{
/* Note: Errata document - 1.1 */
enable_fifop_interrupt(cc2520, false);
enable_fifop_interrupt(dev, false);
instruct_sflushrx(cc2520);
instruct_sflushrx(cc2520);
instruct_sflushrx(dev);
instruct_sflushrx(dev);
enable_fifop_interrupt(cc2520, true);
enable_fifop_interrupt(dev, true);
write_reg_excflag0(cc2520, EXCFLAG0_RESET_RX_FLAGS);
write_reg_excflag0(dev, EXCFLAG0_RESET_RX_FLAGS);
}
static inline uint8_t read_rxfifo_length(struct cc2520_context *ctx)
static inline uint8_t read_rxfifo_length(const struct device *dev)
{
uint8_t len;
if (z_cc2520_access(ctx, true, CC2520_INS_RXBUF, 0, &len, 1)) {
if (z_cc2520_access(dev, true, CC2520_INS_RXBUF, 0, &len, 1)) {
return len;
}
return 0;
}
static inline bool read_rxfifo_content(struct cc2520_context *ctx,
static inline bool read_rxfifo_content(const struct device *dev,
struct net_buf *buf, uint8_t len)
{
if (!z_cc2520_access(ctx, true, CC2520_INS_RXBUF, 0, buf->data, len)) {
if (!z_cc2520_access(dev, true, CC2520_INS_RXBUF, 0, buf->data, len)) {
return false;
}
if (read_reg_excflag0(ctx) & EXCFLAG0_RX_UNDERFLOW) {
if (read_reg_excflag0(dev) & EXCFLAG0_RX_UNDERFLOW) {
LOG_ERR("RX underflow!");
return false;
}
@ -580,11 +557,11 @@ static inline void insert_radio_noise_details(struct net_pkt *pkt, uint8_t *buf)
net_pkt_set_ieee802154_lqi(pkt, lqi);
}
static inline bool verify_crc(struct cc2520_context *ctx, struct net_pkt *pkt)
static inline bool verify_crc(const struct device *dev, struct net_pkt *pkt)
{
uint8_t fcs[2];
if (!z_cc2520_access(ctx, true, CC2520_INS_RXBUF, 0, &fcs, 2)) {
if (!z_cc2520_access(dev, true, CC2520_INS_RXBUF, 0, &fcs, 2)) {
return false;
}
@ -597,10 +574,10 @@ static inline bool verify_crc(struct cc2520_context *ctx, struct net_pkt *pkt)
return true;
}
static inline bool verify_rxfifo_validity(struct cc2520_context *ctx,
static inline bool verify_rxfifo_validity(const struct device *dev,
uint8_t pkt_len)
{
if (pkt_len < 2 || read_reg_rxfifocnt(ctx) != pkt_len) {
if (pkt_len < 2 || read_reg_rxfifocnt(dev) != pkt_len) {
return false;
}
@ -609,7 +586,8 @@ static inline bool verify_rxfifo_validity(struct cc2520_context *ctx,
static void cc2520_rx(void *arg)
{
struct cc2520_context *cc2520 = arg;
const struct device *dev = arg;
struct cc2520_context *cc2520 = dev->data;
struct net_pkt *pkt;
uint8_t pkt_len;
@ -625,8 +603,8 @@ static void cc2520_rx(void *arg)
goto flush;
}
pkt_len = read_rxfifo_length(cc2520) & 0x7f;
if (!verify_rxfifo_validity(cc2520, pkt_len)) {
pkt_len = read_rxfifo_length(dev) & 0x7f;
if (!verify_rxfifo_validity(dev, pkt_len)) {
LOG_ERR("Invalid content");
goto flush;
}
@ -642,12 +620,12 @@ static void cc2520_rx(void *arg)
pkt_len -= 2U;
}
if (!read_rxfifo_content(cc2520, pkt->buffer, pkt_len)) {
if (!read_rxfifo_content(dev, pkt->buffer, pkt_len)) {
LOG_ERR("No content read");
goto flush;
}
if (!verify_crc(cc2520, pkt)) {
if (!verify_crc(dev, pkt)) {
LOG_ERR("Bad packet CRC");
goto out;
}
@ -669,7 +647,7 @@ static void cc2520_rx(void *arg)
flush:
cc2520_print_exceptions(cc2520);
cc2520_print_errors(cc2520);
flush_rxfifo(cc2520);
flush_rxfifo(dev);
out:
if (pkt) {
net_pkt_unref(pkt);
@ -690,9 +668,7 @@ static enum ieee802154_hw_caps cc2520_get_capabilities(const struct device *dev)
static int cc2520_cca(const struct device *dev)
{
struct cc2520_context *cc2520 = dev->data;
if (!get_cca(cc2520)) {
if (!get_cca(dev)) {
LOG_WRN("Busy");
return -EBUSY;
}
@ -702,8 +678,6 @@ static int cc2520_cca(const struct device *dev)
static int cc2520_set_channel(const struct device *dev, uint16_t channel)
{
struct cc2520_context *cc2520 = dev->data;
LOG_DBG("%u", channel);
if (channel < 11 || channel > 26) {
@ -713,7 +687,7 @@ static int cc2520_set_channel(const struct device *dev, uint16_t channel)
/* See chapter 16 */
channel = 11 + (channel - 11) * 5U;
if (!write_reg_freqctrl(cc2520, FREQCTRL_FREQ(channel))) {
if (!write_reg_freqctrl(dev, FREQCTRL_FREQ(channel))) {
LOG_ERR("Failed");
return -EIO;
}
@ -745,7 +719,6 @@ static int cc2520_filter(const struct device *dev,
static int cc2520_set_txpower(const struct device *dev, int16_t dbm)
{
struct cc2520_context *cc2520 = dev->data;
uint8_t pwr;
LOG_DBG("%d", dbm);
@ -783,7 +756,7 @@ static int cc2520_set_txpower(const struct device *dev, int16_t dbm)
goto error;
}
if (!write_reg_txpower(cc2520, pwr)) {
if (!write_reg_txpower(dev, pwr)) {
goto error;
}
@ -811,14 +784,14 @@ static int cc2520_tx(const struct device *dev,
LOG_DBG("%p (%u)", frag, len);
if (!write_reg_excflag0(cc2520, EXCFLAG0_RESET_TX_FLAGS) ||
!write_txfifo_length(cc2520, len) ||
!write_txfifo_content(cc2520, frame, len)) {
if (!write_reg_excflag0(dev, EXCFLAG0_RESET_TX_FLAGS) ||
!write_txfifo_length(dev, len) ||
!write_txfifo_content(dev, frame, len)) {
LOG_ERR("Cannot feed in TX fifo");
goto error;
}
if (!verify_txfifo_status(cc2520, len)) {
if (!verify_txfifo_status(dev, len)) {
LOG_ERR("Did not write properly into TX FIFO");
goto error;
}
@ -832,7 +805,7 @@ static int cc2520_tx(const struct device *dev,
atomic_set(&cc2520->tx, 1);
k_sem_init(&cc2520->tx_sync, 0, K_SEM_MAX_LIMIT);
if (!instruct_stxoncca(cc2520)) {
if (!instruct_stxoncca(dev)) {
LOG_ERR("Cannot start transmission");
goto error;
}
@ -840,7 +813,7 @@ static int cc2520_tx(const struct device *dev,
k_sem_take(&cc2520->tx_sync, K_MSEC(10));
retry--;
status = verify_tx_done(cc2520);
status = verify_tx_done(dev);
} while (!status && retry);
#ifdef CONFIG_IEEE802154_CC2520_CRYPTO
@ -860,41 +833,37 @@ error:
cc2520_print_errors(cc2520);
atomic_set(&cc2520->tx, 0);
instruct_sflushtx(cc2520);
instruct_sflushtx(dev);
return -EIO;
}
static int cc2520_start(const struct device *dev)
{
struct cc2520_context *cc2520 = dev->data;
if (!instruct_sxoscon(cc2520) ||
!instruct_srxon(cc2520) ||
!verify_osc_stabilization(cc2520)) {
if (!instruct_sxoscon(dev) ||
!instruct_srxon(dev) ||
!verify_osc_stabilization(dev)) {
LOG_ERR("Error starting CC2520");
return -EIO;
}
flush_rxfifo(cc2520);
flush_rxfifo(dev);
enable_fifop_interrupt(cc2520, true);
enable_sfd_interrupt(cc2520, true);
enable_fifop_interrupt(dev, true);
enable_sfd_interrupt(dev, true);
return 0;
}
static int cc2520_stop(const struct device *dev)
{
struct cc2520_context *cc2520 = dev->data;
flush_rxfifo(dev);
flush_rxfifo(cc2520);
enable_fifop_interrupt(dev, false);
enable_sfd_interrupt(dev, false);
enable_fifop_interrupt(cc2520, false);
enable_sfd_interrupt(cc2520, false);
if (!instruct_srfoff(cc2520) ||
!instruct_sxoscoff(cc2520)) {
if (!instruct_srfoff(dev) ||
!instruct_sxoscoff(dev)) {
LOG_ERR("Error stopping CC2520");
return -EIO;
}
@ -907,8 +876,6 @@ static int cc2520_stop(const struct device *dev)
*****************/
static int power_on_and_setup(const struct device *dev)
{
struct cc2520_context *cc2520 = dev->data;
/* Switching to LPM2 mode */
set_reset(dev, 0);
z_usleep(150);
@ -923,22 +890,22 @@ static int power_on_and_setup(const struct device *dev)
set_reset(dev, 1);
z_usleep(150);
if (!verify_osc_stabilization(cc2520)) {
if (!verify_osc_stabilization(dev)) {
return -EIO;
}
/* Default settings to always write (see chapter 28 part 1) */
if (!write_reg_txpower(cc2520, CC2520_TXPOWER_DEFAULT) ||
!write_reg_ccactrl0(cc2520, CC2520_CCACTRL0_DEFAULT) ||
!write_reg_mdmctrl0(cc2520, CC2520_MDMCTRL0_DEFAULT) ||
!write_reg_mdmctrl1(cc2520, CC2520_MDMCTRL1_DEFAULT) ||
!write_reg_rxctrl(cc2520, CC2520_RXCTRL_DEFAULT) ||
!write_reg_fsctrl(cc2520, CC2520_FSCTRL_DEFAULT) ||
!write_reg_fscal1(cc2520, CC2520_FSCAL1_DEFAULT) ||
!write_reg_agcctrl1(cc2520, CC2520_AGCCTRL1_DEFAULT) ||
!write_reg_adctest0(cc2520, CC2520_ADCTEST0_DEFAULT) ||
!write_reg_adctest1(cc2520, CC2520_ADCTEST1_DEFAULT) ||
!write_reg_adctest2(cc2520, CC2520_ADCTEST2_DEFAULT)) {
if (!write_reg_txpower(dev, CC2520_TXPOWER_DEFAULT) ||
!write_reg_ccactrl0(dev, CC2520_CCACTRL0_DEFAULT) ||
!write_reg_mdmctrl0(dev, CC2520_MDMCTRL0_DEFAULT) ||
!write_reg_mdmctrl1(dev, CC2520_MDMCTRL1_DEFAULT) ||
!write_reg_rxctrl(dev, CC2520_RXCTRL_DEFAULT) ||
!write_reg_fsctrl(dev, CC2520_FSCTRL_DEFAULT) ||
!write_reg_fscal1(dev, CC2520_FSCAL1_DEFAULT) ||
!write_reg_agcctrl1(dev, CC2520_AGCCTRL1_DEFAULT) ||
!write_reg_adctest0(dev, CC2520_ADCTEST0_DEFAULT) ||
!write_reg_adctest1(dev, CC2520_ADCTEST1_DEFAULT) ||
!write_reg_adctest2(dev, CC2520_ADCTEST2_DEFAULT)) {
return -EIO;
}
@ -948,21 +915,21 @@ static int power_on_and_setup(const struct device *dev)
* FRMFILT0: Frame filtering (setting CC2520_FRAME_FILTERING)
* FIFOPCTRL: Set TX threshold (setting CC2520_TX_THRESHOLD)
*/
if (!write_reg_extclock(cc2520, 0) ||
!write_reg_frmctrl0(cc2520, CC2520_AUTOMATISM) ||
!write_reg_frmctrl1(cc2520, FRMCTRL1_IGNORE_TX_UNDERF |
if (!write_reg_extclock(dev, 0) ||
!write_reg_frmctrl0(dev, CC2520_AUTOMATISM) ||
!write_reg_frmctrl1(dev, FRMCTRL1_IGNORE_TX_UNDERF |
FRMCTRL1_SET_RXENMASK_ON_TX) ||
!write_reg_frmfilt0(cc2520, FRMFILT0_FRAME_FILTER_EN |
!write_reg_frmfilt0(dev, FRMFILT0_FRAME_FILTER_EN |
FRMFILT0_MAX_FRAME_VERSION(3)) ||
!write_reg_frmfilt1(cc2520, FRMFILT1_ACCEPT_ALL) ||
!write_reg_srcmatch(cc2520, SRCMATCH_DEFAULTS) ||
!write_reg_fifopctrl(cc2520,
!write_reg_frmfilt1(dev, FRMFILT1_ACCEPT_ALL) ||
!write_reg_srcmatch(dev, SRCMATCH_DEFAULTS) ||
!write_reg_fifopctrl(dev,
FIFOPCTRL_FIFOP_THR(CC2520_TX_THRESHOLD))) {
return -EIO;
}
/* Cleaning up TX fifo */
instruct_sflushtx(cc2520);
instruct_sflushtx(dev);
setup_gpio_callbacks(dev);
@ -971,121 +938,36 @@ static int power_on_and_setup(const struct device *dev)
return 0;
}
static struct cc2520_gpio_configuration *configure_gpios(const struct device *dev)
static int configure_gpios(const struct device *dev)
{
struct cc2520_context *cc2520 = dev->data;
const struct device *gpio;
const struct cc2520_config *cfg = dev->config;
/* VREG_EN */
gpio = device_get_binding(DT_INST_GPIO_LABEL(0, vreg_en_gpios));
if (!gpio) {
return NULL;
}
cc2520->gpios[CC2520_GPIO_IDX_VREG_EN].pin = DT_INST_GPIO_PIN(0, vreg_en_gpios);
gpio_pin_configure(gpio, cc2520->gpios[CC2520_GPIO_IDX_VREG_EN].pin,
GPIO_OUTPUT_LOW | DT_INST_GPIO_FLAGS(0, vreg_en_gpios));
cc2520->gpios[CC2520_GPIO_IDX_VREG_EN].dev = gpio;
/* RESET */
gpio = device_get_binding(DT_INST_GPIO_LABEL(0, reset_gpios));
if (!gpio) {
return NULL;
}
cc2520->gpios[CC2520_GPIO_IDX_RESET].pin = DT_INST_GPIO_PIN(0, reset_gpios);
gpio_pin_configure(gpio, cc2520->gpios[CC2520_GPIO_IDX_RESET].pin,
GPIO_OUTPUT_LOW | DT_INST_GPIO_FLAGS(0, reset_gpios));
cc2520->gpios[CC2520_GPIO_IDX_RESET].dev = gpio;
/*FIFO */
gpio = device_get_binding(DT_INST_GPIO_LABEL(0, fifo_gpios));
if (!gpio) {
return NULL;
}
cc2520->gpios[CC2520_GPIO_IDX_FIFO].pin = DT_INST_GPIO_PIN(0, fifo_gpios);
gpio_pin_configure(gpio, cc2520->gpios[CC2520_GPIO_IDX_FIFO].pin,
GPIO_INPUT | DT_INST_GPIO_FLAGS(0, fifo_gpios));
cc2520->gpios[CC2520_GPIO_IDX_FIFO].dev = gpio;
/* CCA */
gpio = device_get_binding(DT_INST_GPIO_LABEL(0, cca_gpios));
if (!gpio) {
return NULL;
}
cc2520->gpios[CC2520_GPIO_IDX_CCA].pin = DT_INST_GPIO_PIN(0, cca_gpios);
gpio_pin_configure(gpio, cc2520->gpios[CC2520_GPIO_IDX_CCA].pin,
GPIO_INPUT | DT_INST_GPIO_FLAGS(0, cca_gpios));
cc2520->gpios[CC2520_GPIO_IDX_CCA].dev = gpio;
/* SFD */
gpio = device_get_binding(DT_INST_GPIO_LABEL(0, sfd_gpios));
if (!gpio) {
return NULL;
}
cc2520->gpios[CC2520_GPIO_IDX_SFD].pin = DT_INST_GPIO_PIN(0, sfd_gpios);
gpio_pin_configure(gpio, cc2520->gpios[CC2520_GPIO_IDX_SFD].pin,
GPIO_INPUT | DT_INST_GPIO_FLAGS(0, sfd_gpios));
cc2520->gpios[CC2520_GPIO_IDX_SFD].dev = gpio;
/* FIFOP */
gpio = device_get_binding(DT_INST_GPIO_LABEL(0, fifop_gpios));
if (!gpio) {
return NULL;
}
cc2520->gpios[CC2520_GPIO_IDX_FIFOP].pin = DT_INST_GPIO_PIN(0, fifop_gpios);
gpio_pin_configure(gpio, cc2520->gpios[CC2520_GPIO_IDX_FIFOP].pin,
GPIO_INPUT | DT_INST_GPIO_FLAGS(0, sfd_gpios));
cc2520->gpios[CC2520_GPIO_IDX_FIFOP].dev = gpio;
return cc2520->gpios;
}
static inline int configure_spi(const struct device *dev)
{
struct cc2520_context *cc2520 = dev->data;
cc2520->spi = device_get_binding(DT_INST_BUS_LABEL(0));
if (!cc2520->spi) {
LOG_ERR("Unable to get SPI device");
if (!device_is_ready(cfg->vreg_en.port) ||
!device_is_ready(cfg->reset.port) ||
!device_is_ready(cfg->fifo.port) ||
!device_is_ready(cfg->cca.port) ||
!device_is_ready(cfg->sfd.port) ||
!device_is_ready(cfg->fifop.port)) {
return -ENODEV;
}
#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
cs_ctrl.gpio_dev = device_get_binding(
DT_INST_SPI_DEV_CS_GPIOS_LABEL(0));
if (!cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get GPIO SPI CS device");
return -ENODEV;
}
cs_ctrl.gpio_pin = DT_INST_SPI_DEV_CS_GPIOS_PIN(0);
cs_ctrl.gpio_dt_flags = DT_INST_SPI_DEV_CS_GPIOS_FLAGS(0);
cs_ctrl.delay = 0U;
cc2520->spi_cfg.cs = &cs_ctrl;
LOG_DBG("SPI GPIO CS configured on %s:%u",
DT_INST_SPI_DEV_CS_GPIOS_LABEL(0),
DT_INST_SPI_DEV_CS_GPIOS_PIN(0));
#endif
cc2520->spi_cfg.frequency = DT_INST_PROP(0, spi_max_frequency);
cc2520->spi_cfg.operation = SPI_WORD_SET(8);
cc2520->spi_cfg.slave = DT_INST_REG_ADDR(0);
gpio_pin_configure_dt(&cfg->vreg_en, GPIO_OUTPUT_LOW);
gpio_pin_configure_dt(&cfg->reset, GPIO_OUTPUT_LOW);
gpio_pin_configure_dt(&cfg->fifo, GPIO_INPUT);
gpio_pin_configure_dt(&cfg->cca, GPIO_INPUT);
gpio_pin_configure_dt(&cfg->sfd, GPIO_INPUT);
gpio_pin_configure_dt(&cfg->fifop, GPIO_INPUT);
return 0;
}
static int cc2520_init(const struct device *dev)
{
const struct cc2520_config *cfg = dev->config;
struct cc2520_context *cc2520 = dev->data;
cc2520->dev = dev;
atomic_set(&cc2520->tx, 0);
k_sem_init(&cc2520->rx_lock, 0, K_SEM_MAX_LIMIT);
@ -1093,13 +975,13 @@ static int cc2520_init(const struct device *dev)
k_sem_init(&cc2520->access_lock, 1, 1);
#endif
if (!configure_gpios(dev)) {
if (configure_gpios(dev) != 0) {
LOG_ERR("Configuring GPIOS failed");
return -EIO;
}
if (configure_spi(dev) != 0) {
LOG_ERR("Configuring SPI failed");
if (!spi_is_ready(&cfg->bus)) {
LOG_ERR("SPI bus %s not ready", cfg->bus.bus->name);
return -EIO;
}
@ -1113,7 +995,7 @@ static int cc2520_init(const struct device *dev)
k_thread_create(&cc2520->cc2520_rx_thread, cc2520->cc2520_rx_stack,
CONFIG_IEEE802154_CC2520_RX_STACK_SIZE,
(k_thread_entry_t)cc2520_rx,
cc2520, NULL, NULL, K_PRIO_COOP(2), 0, K_NO_WAIT);
(void *)dev, NULL, NULL, K_PRIO_COOP(2), 0, K_NO_WAIT);
k_thread_name_set(&cc2520->cc2520_rx_thread, "cc2520_rx");
LOG_INF("CC2520 initialized");
@ -1134,6 +1016,16 @@ static void cc2520_iface_init(struct net_if *iface)
ieee802154_init(iface);
}
static const struct cc2520_config cc2520_config = {
.bus = SPI_DT_SPEC_INST_GET(0, SPI_WORD_SET(8), 0),
.vreg_en = GPIO_DT_SPEC_INST_GET(0, vreg_en_gpios),
.reset = GPIO_DT_SPEC_INST_GET(0, reset_gpios),
.fifo = GPIO_DT_SPEC_INST_GET(0, fifo_gpios),
.cca = GPIO_DT_SPEC_INST_GET(0, cca_gpios),
.sfd = GPIO_DT_SPEC_INST_GET(0, sfd_gpios),
.fifop = GPIO_DT_SPEC_INST_GET(0, fifop_gpios)
};
static struct cc2520_context cc2520_context_data;
static struct ieee802154_radio_api cc2520_radio_api = {
@ -1157,7 +1049,7 @@ DEVICE_DEFINE(cc2520, CONFIG_IEEE802154_CC2520_DRV_NAME,
#else
NET_DEVICE_INIT(cc2520, CONFIG_IEEE802154_CC2520_DRV_NAME,
cc2520_init, NULL,
&cc2520_context_data, NULL,
&cc2520_context_data, &cc2520_config,
CONFIG_IEEE802154_CC2520_INIT_PRIO,
&cc2520_radio_api, IEEE802154_L2,
NET_L2_GET_CTX_TYPE(IEEE802154_L2), 125);
@ -1166,21 +1058,21 @@ NET_DEVICE_INIT(cc2520, CONFIG_IEEE802154_CC2520_DRV_NAME,
#ifdef CONFIG_IEEE802154_CC2520_CRYPTO
static inline bool cc2520_read_ram(struct cc2520_context *ctx, uint16_t addr,
static inline bool cc2520_read_ram(const struct device *dev, uint16_t addr,
uint8_t *data_buf, uint8_t len)
{
return z_cc2520_access(dev, true, CC2520_INS_MEMRD,
addr, data_buf, len);
}
static inline bool cc2520_write_ram(const struct device *dev, uint16_t addr,
uint8_t *data_buf, uint8_t len)
{
return z_cc2520_access(ctx, true, CC2520_INS_MEMRD,
addr, data_buf, len);
return z_cc2520_access(dev, false, CC2520_INS_MEMWR,
addr, data_buf, len);
}
static inline bool cc2520_write_ram(struct cc2520_context *ctx, uint16_t addr,
uint8_t *data_buf, uint8_t len)
{
return z_cc2520_access(ctx, false, CC2520_INS_MEMWR,
addr, data_buf, len);
}
static inline bool instruct_uccm_ccm(struct cc2520_context *cc2520,
static inline bool instruct_uccm_ccm(const struct device *dev,
bool uccm,
uint8_t key_addr,
uint8_t auth_crypt,
@ -1190,6 +1082,8 @@ static inline bool instruct_uccm_ccm(struct cc2520_context *cc2520,
uint8_t in_len,
uint8_t m)
{
const struct cc2520_config *cfg = dev->config;
struct cc2520_context *ctx = dev->data;
uint8_t cmd[9];
const struct spi_buf buf[1] = {
{
@ -1220,11 +1114,11 @@ static inline bool instruct_uccm_ccm(struct cc2520_context *cc2520,
cmd[7] = (in_len & 0x7f);
cmd[8] = (m & 0x03);
k_sem_take(&cc2520->access_lock, K_FOREVER);
k_sem_take(&ctx->access_lock, K_FOREVER);
ret = spi_write(cc2520->spi, &cc2520->spi_cfg, &tx);
ret = spi_write_dt(&cfg->bus, &tx);
k_sem_give(&cc2520->access_lock);
k_sem_give(&ctx->access_lock);
if (ret) {
LOG_ERR("%sCCM Failed", uccm ? "U" : "");
@ -1252,7 +1146,7 @@ static int insert_crypto_parameters(struct cipher_ctx *ctx,
struct cipher_aead_pkt *apkt,
uint8_t *ccm_nonce, uint8_t *auth_crypt)
{
struct cc2520_context *cc2520 = ctx->device->data;
const struct device *cc2520 = ctx->device;
uint8_t data[128];
uint8_t *in_buf;
uint8_t in_len;
@ -1343,7 +1237,7 @@ static int cc2520_crypto_ccm(struct cipher_ctx *ctx,
struct cipher_aead_pkt *apkt,
uint8_t *ccm_nonce)
{
struct cc2520_context *cc2520 = ctx->device->data;
const struct device *cc2520 = ctx->device;
uint8_t auth_crypt;
int m;
@ -1388,7 +1282,7 @@ static int cc2520_crypto_uccm(struct cipher_ctx *ctx,
struct cipher_aead_pkt *apkt,
uint8_t *ccm_nonce)
{
struct cc2520_context *cc2520 = ctx->device->data;
const struct device *cc2520 = ctx->device;
uint8_t auth_crypt;
int m;

141
drivers/ieee802154/ieee802154_cc2520.h
View file

@ -11,22 +11,21 @@
#include <linker/sections.h>
#include <sys/atomic.h>
#include <drivers/gpio.h>
#include <drivers/spi.h>
enum cc2520_gpio_index {
CC2520_GPIO_IDX_VREG_EN = 0,
CC2520_GPIO_IDX_RESET,
CC2520_GPIO_IDX_FIFO,
CC2520_GPIO_IDX_CCA,
CC2520_GPIO_IDX_SFD,
CC2520_GPIO_IDX_FIFOP,
/* Compile time config structure
*******************************
*/
CC2520_GPIO_IDX_MAX,
};
struct cc2520_gpio_configuration {
const struct device *dev;
uint32_t pin;
struct cc2520_config {
struct spi_dt_spec bus;
struct gpio_dt_spec vreg_en;
struct gpio_dt_spec reset;
struct gpio_dt_spec fifo;
struct gpio_dt_spec cca;
struct gpio_dt_spec sfd;
struct gpio_dt_spec fifop;
};
/* Runtime context structure
@ -35,11 +34,9 @@ struct cc2520_gpio_configuration {
struct cc2520_context {
struct net_if *iface;
/**************************/
struct cc2520_gpio_configuration gpios[CC2520_GPIO_IDX_MAX];
const struct device *dev;
struct gpio_callback sfd_cb;
struct gpio_callback fifop_cb;
const struct device *spi;
struct spi_config spi_cfg;
uint8_t mac_addr[8];
/************TX************/
struct k_sem tx_sync;
@ -62,49 +59,49 @@ struct cc2520_context {
***************************
*/
bool z_cc2520_access(struct cc2520_context *ctx, bool read, uint8_t ins,
uint16_t addr, void *data, size_t length);
bool z_cc2520_access(const struct device *dev, bool read, uint8_t ins,
uint16_t addr, void *data, size_t length);
#define DEFINE_SREG_READ(__reg_name, __reg_addr) \
static inline uint8_t read_reg_##__reg_name(struct cc2520_context *ctx) \
{ \
uint8_t val; \
\
if (z_cc2520_access(ctx, true, CC2520_INS_MEMRD, \
__reg_addr, &val, 1)) { \
return val; \
} \
\
return 0; \
#define DEFINE_SREG_READ(__reg_name, __reg_addr) \
static inline uint8_t read_reg_##__reg_name(const struct device *dev) \
{ \
uint8_t val; \
\
if (z_cc2520_access(dev, true, CC2520_INS_MEMRD, \
__reg_addr, &val, 1)) { \
return val; \
} \
\
return 0; \
}
#define DEFINE_SREG_WRITE(__reg_name, __reg_addr) \
static inline bool write_reg_##__reg_name(struct cc2520_context *ctx, \
uint8_t val) \
{ \
return z_cc2520_access(ctx, false, CC2520_INS_MEMWR, \
__reg_addr, &val, 1); \
#define DEFINE_SREG_WRITE(__reg_name, __reg_addr) \
static inline bool write_reg_##__reg_name(const struct device *dev, \
uint8_t val) \
{ \
return z_cc2520_access(dev, false, CC2520_INS_MEMWR, \
__reg_addr, &val, 1); \
}
#define DEFINE_FREG_READ(__reg_name, __reg_addr) \
static inline uint8_t read_reg_##__reg_name(struct cc2520_context *ctx) \
{ \
uint8_t val; \
\
if (z_cc2520_access(ctx, true, CC2520_INS_REGRD, \
__reg_addr, &val, 1)) { \
return val; \
} \
\
return 0; \
#define DEFINE_FREG_READ(__reg_name, __reg_addr) \
static inline uint8_t read_reg_##__reg_name(const struct device *dev) \
{ \
uint8_t val; \
\
if (z_cc2520_access(dev, true, CC2520_INS_REGRD, \
__reg_addr, &val, 1)) { \
return val; \
} \
\
return 0; \
}
#define DEFINE_FREG_WRITE(__reg_name, __reg_addr) \
static inline bool write_reg_##__reg_name(struct cc2520_context *ctx, \
uint8_t val) \
{ \
return z_cc2520_access(ctx, false, CC2520_INS_REGWR, \
__reg_addr, &val, 1); \
#define DEFINE_FREG_WRITE(__reg_name, __reg_addr) \
static inline bool write_reg_##__reg_name(const struct device *dev, \
uint8_t val) \
{ \
return z_cc2520_access(dev, false, CC2520_INS_REGWR, \
__reg_addr, &val, 1); \
}
DEFINE_FREG_READ(excflag0, CC2520_FREG_EXCFLAG0)
@ -150,12 +147,12 @@ DEFINE_SREG_WRITE(extclock, CC2520_SREG_EXTCLOCK)
************************
*/
#define DEFINE_MEM_WRITE(__mem_name, __addr, __sz) \
static inline bool write_mem_##__mem_name(struct cc2520_context *ctx, \
uint8_t *buf) \
{ \
return z_cc2520_access(ctx, false, CC2520_INS_MEMWR, \
__addr, buf, __sz); \
#define DEFINE_MEM_WRITE(__mem_name, __addr, __sz) \
static inline bool write_mem_##__mem_name(const struct device *dev, \
uint8_t *buf) \
{ \
return z_cc2520_access(dev, false, CC2520_INS_MEMWR, \
__addr, buf, __sz); \
}
DEFINE_MEM_WRITE(short_addr, CC2520_MEM_SHORT_ADDR, 2)
@ -167,30 +164,30 @@ DEFINE_MEM_WRITE(ext_addr, CC2520_MEM_EXT_ADDR, 8)
******************************
*/
static inline bool cc2520_command_strobe(struct cc2520_context *ctx,
uint8_t instruction)
static inline bool cc2520_command_strobe(const struct device *dev,
uint8_t instruction)
{
return z_cc2520_access(ctx, false, instruction, 0, NULL, 0);
return z_cc2520_access(dev, false, instruction, 0, NULL, 0);
}
static inline bool cc2520_command_strobe_snop(struct cc2520_context *ctx,
uint8_t instruction)
static inline bool cc2520_command_strobe_snop(const struct device *dev,
uint8_t instruction)
{
uint8_t snop[1] = { CC2520_INS_SNOP };
return z_cc2520_access(ctx, false, instruction, 0, snop, 1);
return z_cc2520_access(dev, false, instruction, 0, snop, 1);
}
#define DEFINE_STROBE_INSTRUCTION(__ins_name, __ins) \
static inline bool instruct_##__ins_name(struct cc2520_context *ctx) \
{ \
return cc2520_command_strobe(ctx, __ins); \
#define DEFINE_STROBE_INSTRUCTION(__ins_name, __ins) \
static inline bool instruct_##__ins_name(const struct device *dev) \
{ \
return cc2520_command_strobe(dev, __ins); \
}
#define DEFINE_STROBE_SNOP_INSTRUCTION(__ins_name, __ins) \
static inline bool instruct_##__ins_name(struct cc2520_context *ctx) \
{ \
return cc2520_command_strobe_snop(ctx, __ins); \
#define DEFINE_STROBE_SNOP_INSTRUCTION(__ins_name, __ins) \
static inline bool instruct_##__ins_name(const struct device *dev) \
{ \
return cc2520_command_strobe_snop(dev, __ins); \
}
DEFINE_STROBE_INSTRUCTION(srxon, CC2520_INS_SRXON)