boards: riscv: hifive_unleashed: add GPIO support

This patch adds GPIO and 96board LS (Low Speed)iexpansion  connector
support for SiFive HiFive Unleashed and also enables GPIO basic test.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>

boards/riscv/hifive_unleashed/hifive_unleashed.dts

@@ -20,6 +20,25 @@
 		reg = <0x80000000 0xf0000000>;
 		reg-names = "mem";
 	};
+
+	lscon_96b: connector {
+		compatible = "linaro,96b-lscon-1v8";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map = <22 0 &gpio0 0 0>,	/* GPIO-A */
+			   <23 0 &gpio0 1 0>,	/* GPIO-B */
+			   <24 0 &gpio0 2 0>,	/* GPIO-C */
+			   <25 0 &gpio0 3 0>,	/* GPIO-D */
+			   <26 0 &gpio0 4 0>,	/* GPIO-E */
+			   <27 0 &gpio0 5 0>,	/* GPIO-F */
+			   <38 0 &gpio0 6 0>,	/* GPIO-G */
+			   <39 0 &gpio0 7 0>,	/* GPIO-H */
+			   <30 0 &gpio0 8 0>,	/* GPIO-I */
+			   <31 0 &gpio0 9 0>,	/* GPIO-J */
+			   <32 0 &gpio0 15 0>;	/* GPIO-K */
+			   /* GPIO-L not connected */
+	};
 };
 
 &uart0 {
@@ -52,3 +71,7 @@
 	status = "okay";
 	clock-frequency = <500000000>;
 };
+
+&gpio0 {
+	status = "okay";
+};

boards/riscv/hifive_unleashed/hifive_unleashed.yaml

@@ -10,4 +10,5 @@ testing:
     - net
     - bluetooth
 supported:
+  - gpio
   - spi

boards/riscv/hifive_unleashed/hifive_unleashed_defconfig

@@ -4,6 +4,8 @@ CONFIG_BOARD_HIFIVE_UNLEASHED=y
 CONFIG_RISCV_MACHINE_TIMER=y
 CONFIG_PLIC=y
 CONFIG_CONSOLE=y
+CONFIG_GPIO=y
+CONFIG_GPIO_SIFIVE=y
 CONFIG_SPI=y
 CONFIG_SPI_SIFIVE=y
 CONFIG_SERIAL=y

drivers/gpio/Kconfig.sifive

@@ -5,7 +5,7 @@
 
 config GPIO_SIFIVE
 	bool "SiFive Freedom Processor GPIO driver"
-	depends on SOC_RISCV_SIFIVE_FREEDOM
+	depends on SOC_SERIES_RISCV_SIFIVE_FREEDOM
 	help
 	  Enable driver for the SiFive Freedom GPIO controller.
 

dts/riscv/riscv64-fu540.dtsi

@@ -168,5 +168,24 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 		};
+
+		gpio0: gpio@10060000 {
+			compatible = "sifive,gpio0";
+			gpio-controller;
+			interrupt-parent = <&plic>;
+			interrupts = <7 1>, <8 1>, <9 1>, <10 1>,
+				<11 1>, <12 1>, <13 1>, <14 1>,
+				<15 1>, <16 1>, <17 1>, <18 1>,
+				<19 1>, <20 1>, <21 1>, <22 1>;
+			reg = <0x10060000 0x1000>;
+			reg-names = "control";
+			label = "gpio_0";
+			status = "disabled";
+			#gpio-cells = <2>;
+
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+		};
 	};
 };

soc/riscv/riscv-privilege/sifive-freedom/soc.h

@@ -39,6 +39,9 @@
 /* Clock controller. */
 #define PRCI_BASE_ADDR               0x10000000
 
+/* PINMUX MAX PINS */
+#define SIFIVE_PINMUX_PINS           16
+
 #endif
 
 /* Timer configuration */

tests/drivers/gpio/gpio_basic_api/boards/hifive_unleashed.overlay

@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2021 Katsuhiro Suzuki
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	resources {
+		compatible = "test-gpio-basic-api";
+		out-gpios = <&gpio0 0 0>; /* GPIO-A */
+		in-gpios = <&gpio0 1 0>;  /* GPIO-B */
+	};
+};