- The DSI_DPHY_PLL_VCO_MAX and DSI_DPHY_PLL_VCO_MIN macro value is
different when changing to different SoC, so the definition is moved
to soc level driver header.
- Remove the definition in this c file to fix the duplicate definition
issue.
Signed-off-by: Susan Su <susan.su@nxp.com>
Limit DSI data TX to the max payload size possible with this peripheral,
rather than relying on display drivers to respect this limitation.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Fix support for DCS long write command in DSI mcux driver, to enable use
with displays that require this command for full support.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Only setup DPI input from LCDIF if MODE_VIDEO is set, as this
is the the only case where input from the LCDIF would be required to
drive the display. Do not populate the dpi_config structure unless a
reference the the NXP LCDIF device is provided, since this is the output
device providing DPI data.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
With the phy-clock being specified in devicetree (and thus under user
control), there is no need to artificially enlarge the DPHY clock to
insure it is fast enough. Instead, we can calculate the DPHY clock
directly, selecting the closest realizable value that is at least as
fast as the value requested by the user.
Fixes#59215
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update MCUX ELCDIF driver to use new LCDIF bindings. This
update also adds support for configuring the root clock of
the ELCDIF module based on the pixel-clock property to the
RT11xx SOC clock init, as this SOC series has this IP block
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce phy-clock property, which is used by MIPI devices to determine
the target clock frequency for the MIPI PHY. This property can vary
depending on the attached display and target framerate.
Update the MIPI DSI MCUX driver to utilize this property to configure
the MIPI host, and update the RT500 clock initialization to configure
the MIPI root clock based on this property.
Remove dphy-clk-div property from the MIPI DSI 2L binding, as it
is redundant with this change.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
It looks like this platform is using soc.h to declare some display APIs,
imxrt_pre/post_init_display_interface(). This likely deserves a better
design, but for now let's fix compiler warnings.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
