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2 commits

Author SHA1 Message Date
Remy Luisant 6a12fb20ab timer: Add tickless support for the MIPS CP0 timer 
This commit adds support for tickless operation on the MIPS CP0 timer.
The code closely follows the Xtensa and RISCV timer drivers.

All tests pass.

Signed-off-by: Remy Luisant <remy@luisant.ca>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
 2022-01-19 13:48:21 -05:00
Antony Pavlov 9175ed8244 timer: add support for MIPS CP0 timer 
This commit adds a kernel device driver for the MIPS CP0 timer.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
 2022-01-19 13:48:21 -05:00