Watchdog type is found on e.g. Pearl/Jade Gecko, often
more than 1 is present.
Driver supports timeout and (minimum) window configuration
and reset or timeout interrupt support for now.
Signed-off-by: Oane Kingma <o.kingma@interay.com>
Add a script that sets up Docker networking and starts the net-tools
Docker container. If successful, run Zephyr with native_posix and
execute the appropriate net-tools container executable. The proper
net-tools executable and arguments is selected depending on the
basename of the sample directory. This script needs to be updated
if the net-tools Docker image is updated in some incompatible way.
The net-tools directory is assumed to exist at the same level as
the Zephyr base directory, but its location can be set using the
'-N' command line argument. Likewise, '-Z' sets the Zephyr top level
directory.
When stopping Zephyr, go through all child processes since running a
native posix or other variant of Zephyr may cause a hierarchy of
processes to be created.
Fixes: #19540
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
Introduce the basic ARM64 architecture support.
A new CONFIG_ARM64 symbol is introduced for the new architecture and new
cmake / Kconfig files are added to switch between ARM and ARM64.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
ARM cores may have a per-core architected timer, which provides per-cpu
timers, attached to a GIC to deliver its per-processor interrupts via
PPIs. This is the most common case supported by QEMU in the virt
platform.
This patch introduces support for this timer abstracting the way the
timer registers are actually accessed. This is needed because different
architectures (for example ARMv7-R vs ARMv8-A) use different registers
and even the same architecture (ARMv8-A) can actually use different
timers (ELx physical timers vs ELx virtual timers).
So we introduce the common driver here but the actual SoC / architecture
/ board must provide the three helpers (arm_arch_timer_set_compare(),
arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file
imported through the arch/cpu.h header file.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The Silicon Labs EFM32 Jade Gecko MCU includes:
* Cortex-M3 core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* multiple low power peripherals
This is basically the same as the EFM32 Pearl Gecko, but with an ARM
Cortex-M3 core instead of a Cortex-M4F.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
There are various situations where it's necessary to support turning
devices on or off at runtime, includin power rails, clocks, other
peripherals, and binary device power management. The complexity of
properly managing multiple consumers of a device in a multithreaded
system suggests that a shared implementation is desirable. This
commit provides an API that supports managing on-off resources.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This commit adds initial support for the Silicon Labs EFM32
Giant Gecko GG11 StarterKit.
Features supported for now are NVIC, SysTick, GPIO, Flash,
Counter, I2C, UART and Ethernet. Support for Watchdog and
ADC will follow as soon as their respective PRs are merged.
Signed-off-by: Oane Kingma <o.kingma@interay.com>
Add support for storing the CANopen object dictionary to non-volatile
storage.
This fixes#15278.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a Zephyr driver and abstraction layer for use by the 3rd party
CANopenNode module.
CANopenNode depends on the CO_driver.h file for platform-specific type
definitions, locking primitives, and CAN bus driver API.
This fixes#15278.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move LVGL sample from samples/gui/lvgl to samples/display/lvgl to have
a unified location for display related samples.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
As of January 2020, David is no longer working on the Zephyr
documentation, so he should not be automatically added as reviewer.
I've commented out rather than removed the lines so when a replacement
is found, the lines can easily be added back.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Add driver for the Texas Instruments LMP90xxx series of multi-channel,
low-power 16-/24-bit sensor analog frontends (AFEs).
The functionality is split into two drivers; an ADC driver and a GPIO
driver.
Tested with LMP90080 and LMP90100.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
PWM driver for LiteX SoC builder was created.
Because LiteX supports only one channel for each PWM device,
an appropriate restriction was made.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This adds I2C bitbang driver for LiteX SoC builder with its bindings.
Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This adds PRBS ranom number generator driver for
LiteX SoC builder with its bindings.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This adds support for the EC (embedded controller) on a Google
reference board with codename "kukui". This board uses the STM32F098RC
chip. We built an application for the board and verified UART
functionality on the board.
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.
There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Pattern being <domain>_<model>.<c/h>.
Here interrupt_controller as a domain would be far too long so
shortening it to "intc", as DTS does actually.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
wdt_install_timeout() was skipped as it installs an ISR-context
callback handler function. The rest are simple wrappers.
Added myself as the maintainer of the syscall handlers. WDT
subsystem appears to not currently have an owner.
Fixes: #21432
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
net/lib/config/ is important generic part of the network stack, and
should be reviewed by the same people as net/lib/. (Besides, I
originally factored out this lib in the first place.)
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Added leak suppression, by implementing __lsan_default_suppressions
function, for SDL2 and X11 library which are used by the SDL display
driver.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
gen_syscall_header.py is not longer necessary, it was just creating a
file including syscall.h. This header is now included directly by
gen_syscalls.py.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Szymon was removed from all Bluetooth paths a while ago, and this is
simply an overlooked leftover.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
/lib/libc/ was listed twice in the file
The first entry was overriden by the 2nd
And so was the case for
/samples/bluetooth/
In this second case, the override lost a user, so add it
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
There were two conflicting entries for sensor samples, which resulted in
the wrong person getting assigned as a reviewer.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add API for accessing Electrically Erasable Programmable Read-Only
Memory (EEPROM) devices.
EEPROMs have an erase block size of 1 byte, a long lifetime, and allows
overwriting data on byte-by-byte access.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This adds supoprt for the Atmel SAME54 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Add myself to owner of subsys/logging/log_backend_net.c so
that if there are changes to that file, I get notified.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
This commit adds driver support for DMA on f0/f1/f2/f3/f4/l0/l4
series stm32.
Notice due to some bugs, this is currently not working with f7.
There are two kinds of IP blocks are used across these stm32, one is the
one that has been used on F2/F4/F7 series, and the other one is the one
that has been used on F0/F1/F3/L0/L4 series.
Memory to memory transfer is only supported on the second DMA on
F2/F4 with 'st,mem2mem' to be declared in dts.
This driver depends on k_malloc to allocate memory for stream instances,
so CONFIG_HEAP_MEM_POOL_SIZE must be big enough to hold them.
Common parts of the driver are in dma_stm32.c and SoC related parts are
implemented in dma_stm32_v*.c.
This driver has been tested on multiple nucleo boards, including
NUCLEO_F091RC/F103RB/F207ZG/F302R8/F401RE/L073RZ/L476RG with the
loop_transfer and chan_blen_transfer test cases.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
