Add configuration which tests legacy nrf uart driver.
Prevent tests on nrf52_bsim of the new driver (it is requiring
adjustments for the simulation). It will be fixed by another
patch.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add new shim which is based on nrfx driver.
Legacy shim is kept for transition period. It can be used after
setting CONFIG_UART_NRFX_UARTE_LEGACY_SHIM.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Since it takes 400 bytes of code and it is rarely used disable
by default this feature.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add adaptation layer which allows to provide interrupt driven
API for drivers which exposes only asynchronous API.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The channel extraction from string directly uses the end variable with
limited data type, this causes issue if an invalid channel that exceeds
the data is given as an input e.g., 300, which would end up as a valid
channel 44.
Use an intermediate variable with type that can hold all possible
combinations (valid and invalid) and only after validation assign that
to the end type.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
For none and WPA-PSK MFP isn't applicable, it was only introduced in
WPA2-PSK (RSN) and later.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Test assumed non-writen flash to contain 0xff while it is
supposed to check for erase_value.
The "random" buffer has also been updated to skip values that
are equal to erase value.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Do not process SegAcks which were not targeted to the node.
They were rejected in the next if statement always, but generated
the annyoing warning "No matching TX context for ack".
Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
Change the synchronization of RMC and GGA NMEA messages from a
timeout to matching their UTC timestamps.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Remove gpio_clock_names and gpio_mcux_lpc_config->clock_ip_name from
drivers/gpio/gpio_mcux_lpc.c.
The drivers/gpio/gpio_mcux_lpc.c file did not compile with xt-clang
RI-2021.8-win32, as the gpio_clock_names was initialised with a
reference to a static const array. The clock_ip_name member was
initialised from this variable, but it isn't used anywhere else.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
Using the recently added WS2812 PIO driver, this enables the LED on the
QT PY to work with the built in RGB LED examples.
Signed-off-by: Ian Wakely <raveious.irw@gmail.com>
Use the existing `is_posix_policy_prio_valid()` function to
verify the POSIX's priority in the conversion functions.
Changed the `priority` arg of `is_posix_policy_prio_valid` to
`int` since that is the output of `sched_get_priority_min` &
`sched_get_priority_max`.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Made the conversion functions non-static and added ztests for
them to make sure that they work across the full range of
Zephyr priorities.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Changed the variable type of the priority in the args and the
return type of the conversion functions to `int`, as both
Zephyr's priority & POSIX's `sched_priority` has type `int`.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
If `z_prio` is negative and we want to make sure that it is
within `[-CONFIG_NUM_COOP_PRIORITIES, -1]`, we should invert
its sign and make sure that it is `<=`
`CONFIG_NUM_COOP_PRIORITIES` instead of `<`.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Added a top level `posix` shell command for other POSIX
commands. Currently only `uname` is supported.
New POSIX commands can be added by including the
`posix_shell.h` header and use the `POSIX_CMD_ADD` helper
macro.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Previously the sample was using some headers that aren't
available to the host, now we can add a `Makefile.host` to
compile the example on a POSIX OS like Linux:
```
# Go to the sample dir
cd ${ZEPHYR_BASE}/samples/posix/uname
# Compile the sample
make -f Makefile.host
# Run the binary
./build/uname
sysname[65]: Linux
nodename[65]: LAPTOP-YC
release[65]: 5.10.16.3-microsoft-standard-WSL2
version[65]: #1 SMP Fri Apr 2 22:23:49 UTC 2021
machine[65]: x86_64
```
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Relocate the `uname` shell implementation from uname sample, so
that it can be reused by other application and the uname sample
only uses POSIX APIs.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
When the I2C is in the target mode and encounters the bus error, the
driver has to reset the bus to recover the I2C hardware. However, when
the hardware is disabled, the interrupt enable bits are also cleared
automatically by design. As a result, we need to enable the interrupts
after resetting the I2C hardware.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Drop all hardcoded ZEPHYR_SDK_INSTALL_DIR settings, set the variable
automatically from the SDK_VERSION file instead.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This creates a set of substitution rules to replace all current usages
of SDK versions in the documentation, apart from a few that were not
meant to be copy-pastable anyway and the version has just been swapped
with a <version> placeholder.
Since code-block does not parse the content, these have all been
replaced with parsed-literal. That one though parses URLs, which cannot
be broken, so a series of URL substitutions are provided too.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add a SDK_VERSION file pointing to the current SDK version.
This is meant to be used by upstream and downstream CIs to automatically
determined the current version of SDK based on the upstream checked out
version, as well as the documentation references, and intended to stay
in sync with the version used in the main CI.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add driver for NXP nx20p3483 power path controller that can be used
to control and protect sink and source path of USB-C connector.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Add calls to the PPC API that enables and disables the sink and source
paths in the appropriate USB-C stack states.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Add support for ppc shell command with subcommands that can print
the status of PPC (dead battery, sinking, sourcing, vbus detected),
dump registers and request the PPC to exit dead battery mode.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit adds an API to the Power Path Controllers (PPC) that
may be used with USB-C subsystem to control the current paths,
enabling and disabling sourcing and sinking VBUS and protect against
shorts, overvoltage and overcurrent.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
According to the clic specification
(https://github.com/riscv/riscv-fast-interrupt), the mnxti register has
be written, in order to clear the pending bit for non-vectored
interrupts. For vectored interrupts, this is automatically done.
From the spec:
"If the pending interrupt is edge-triggered, hardware will automatically
clear the corresponding pending bit when the CSR instruction that
accesses xnxti includes a write."
I added a kconfig `RISCV_SOC_HAS_CUSTOM_IRQ_HANDLING` to allow custom
irq handling. If enabled, `__soc_handle_all_irqs` has to be implemented.
For clic, non-vectored mode, I added a `__soc_handle_all_irqs`, that
handles the pending interrupts according to the pseudo code in the spec.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
The CLIC has different software-triggerable irqs than the PLIC. I
adjusted them.
Additionally, in a clic the the irq flag 0 would mean triggering on a
positive level. To work with software-triggering, the irqs have to
trigger on a positive edge, i.e. 1.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
If CONFIG_LEGACY_CLIC is disabled, i.e. we adhere to the current CLIC
spec, the mode bits of mtvec have to be 0x3. Everything else is
reserved. Therefore if CONFIG_RISCV_VECTORED_MODE is enabled, the
current implementation is correct. If CONFIG_RISCV_VECTORED_MODE is
disabled, the mode bits have to be set, too.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
The mechanism for hardware vectoring has changed in the clic spec
(https://github.com/riscv/riscv-fast-interrupt) in 2019. Before
vectoring was enabled via `mode` bits in `mtvec`. Support for this was
added in fc480c9382.
With more current clic implementations, this does not work anymore.
Changing the `mode` bits is reserved. Vectoring can be enabled
individually in the `shv` bit of `clicintattr[i]`.
Since the old mechanism is still used, I added a new Kconfig for it.
If this Kconfig is not set, we use the `shv` bit for harware vectoring.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
The trig field of clicintattr is indeed in bits 2:1. However, the mask
`CLIC_INTATTR_TRIG_Msk` is only applied directly to the bitfield
`INTATTR.b.trg`. Therefore it doesn't have to be shifted additionally.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
The irq priority has to be called for dynamic and direct irqs, too. For
direct isrs, this was missing completely, for direct irqs just for the
clic.
For dynamic irqs, I replaced the current implementation with
`z_riscv_irq_priority_set`. For the plic, this is exaclty the same.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
Add support of voltage control to Renesas PFC driver. Voltage register
mappings have been added to r8a77951 and r8a77961 SoCs.
Allow 'power-source' property for 'renesas,rcar-pfc' node. This property
will be used for configuring IO voltage on appropriate pin. For now it
is possible to have only two voltages: 1.8 and 3.3.
Note: it is possible to change voltage only for SD/MMC pins on r8a77951
and r8a77961 SoCs.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
The `SHELL_UART_DEFINE` macro was previously
`SHELL_UART_DEFINE(_name, _tx_ringbuf_size, _rx_ringbuf_size)`,
before it got removed in #63967 and then reinstated in #66218 as
`SHELL_UART_DEFINE(_name)`.
However its current form isn't compatible with previous Zephyr
version, and would cause compilation error when an application
migrates from to v3.6, let's modify it to accept variable
arguments for now.
Added documentation for this public API and updated the
migration guide accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Setting IT8XXX2_EGPIO_EEPODD bit will disable EGAD pin output driving
to avoid leakage when GPIO E1/E2 on it82002 are set to alternate
function.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Modify the sequence of pinctrl setting. Default setting as input mode
prevents leakage during changes to extended setting.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
When device runtime pm is enabled on console device, do not suspend
device synchronously on each char transmission, but rather use asynchronous
suspension request.
This will save useless and costly suspension/resumption procedure, which
can involve uart device clock suspension but also pin configuration
to sleep state (which itself involves gpio clock activation ...).
On STM32, using asynch device suspension allows to divide by 3 the
transmission time of a character chain.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
