This is to update the CODEOWNERS file and to add owner
for these two directories
1) /soc/arm64/intel_socfpga
2) /dts/arm64/intel/*intel_socfpga*
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
This code has gone unmaintained and bugs continue to be reported
against it. We do not have the resources as a project to maintain this
in "odd fixes" mode, and nobody has stepped up to maintain it [1], so
sadly this must be removed for now.
If anyone would like to see civetweb supported in upstream Zephyr
again, they are welcome to add it back, as long as they promise to
maintain it going forward.
Many thanks to everyone who has contributed to civetweb support in
Zephyr while it was here. So long and thanks for all the fish.
Fixes: #45807Fixes: #43910Fixes: #34226Fixes: #46743
[1] https://lists.zephyrproject.org/g/devel/message/8466
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This includes a basic driver for built-in flash on the Texas Intruments
SimpleLink CC13xx/CC26xx SoC series.
The driver makes use of driverlib HAL from TI's SDK and was tested on
two LaunchXL development boards with CC1352R and CC2652R SoCs:
- CC1352R1 LaunchXL
- CC26x2R1 LaunchXL
Tests were done using:
- flash shell sample (samples/drivers/flash_shell)
- littlefs filesystem sample (samples/subsys/fs/littlefs)*
- MCUboot (bootloader/mcuboot/boot/zephyr)*
* additional changes in DTS for the boards were required (partitions
table) and are not part of this changeset (will be introduced later)
Some additional information about the implementation:
1. TI's Technical Reference Manual for CC13x2 and CC26x2 points out that
"An individual 64-bit word can be programmed to change bits 1 to 0"
but it seems this 'alignment' requirement is handled internally by
the ROM function and thus 'write-block-size' is set to 1.
2. Interrupts, VIMS and line buffers are disabled during flash content
update (write or erase) and restored afterwards as recommended by TI.
3. Only RAM to flash write is supported (source of data to be written to
flash can't point to flash).
4. The driver doesn't take care of flash sector protection disable as
that functionality is handled by CCFG. Write or erase requests which
refer to a protected area will fail.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Pinmux is depricated (see #39740) and shouldn't be used anymore
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
All SD cards require SD CMD0 (reset) and CMD8 (send IF cond) at boot.
Add this portion of the initialization flow to SD subsystem, as well as
query command to check if card is SDIO.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Implement SDHC driver for NXP USDHC peripheral, supporting all api calls
available in the sdhc driver. This implementation leverages NXP's HAL,
and simply implements a shim layer over the HAL itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Practically all changes in the last 2 years in this folder
are in actual tests, and not in infrastructure.
There is no need for me to be added as reviewer to them,
specially as all involved know how to ping me if needed.
=> Remove myself from the CODEOWNERS list for
tests/bluetooth/bsim_bt/
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Move include paths and add new target_include_directories to support
backwards compatibility:
* /include -> /include/zephyr
example: <irq.h> -> <zephyr/irq.h>
Issue #41543
Signed-off-by: Yuval Peress <peress@google.com>
Move the kernel documentation up and make it a main chapter. Right now
it is hidden very low in the structure under references.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add myself to the CODEOWNERS for samples/subsys/logging/syst
to make checkpatch happy, and to get notifications of changes
in the sample.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Until now the whole USB device stack code is located
in the top subsys/usb directory. Move it to own directory
in preparation for upcoming extension and rework of USB support.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add a dummy driver for the `vnd,pwm` compatible to allow compilation of
drivers utilising PWM when running "build_all" tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Adds an entropy driver that uses Bluetooth HCI commands as its source
of randomness. As this method is blocking, the ISR API is not supported.
As this method will range from relatively slow (same core Bluetooth HCI
controller) to extremely slow (UART HCI Bluetooth controller), use the
xoshiro PRNG by default for RNG generation.
Implements #37186
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Aspeed ast10x0 series SoCs contain a ARM Cortex-M4F processor. This
processor operates at 200MHz and executes on SRAM.
This patch adds support for ast1030 as the first SoC of this series
which is targeted but not limited at the bridge IC in a server system.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Change-Id: I668af1ff8a36a05da791c3329ae08f5ae712bdd4
As mentioned in #42882, the I2C of IT8XXX2 is designed for two different
IP blocks, so this PR divides this I2C driver into two compatibles.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This contains accessor macros for getting the maximum bitrate supported
by a CAN controller/transceiver combination.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds a USB Type-C Port Controller Driver for
the STM32 USB Type-C / USB Power Delivery (UCPD) peripheral
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
The commit adds guide that describes format of SMP reqests/responses
as issued by Zephyr implementation within mcumgr.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
New driver needs owners (hijack the earlier cAVS wildcard for the
intra-DSP, it's now a legacy thing and essentially unrelated, but is
for the same platform).
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
