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712 commits

Author SHA1 Message Date
Andrzej Głąbek 3454a2547e drivers: nrf_rtc_timer: Remove unnecessary interrupt locking
There is no need to disable interrupts while just checking if
a channel needs to be processed in the ISR, as that section
does not contain anything that needs to be protected against
overwriting from some other context. In particular, if a given
timeout is changed or even aborted while its event is being
checked, this will be correctly handled in the code that follows
and that checks the expiration time.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-01-17 17:00:16 +01:00
Andrzej Głąbek eb0cbb433c drivers: nrf_rtc_timer: Correct initial timeout value
Values to be set to the comparator need to be specified in RTC cycles,
not ticks, so the initial value used in the tickless mode needs to be
MAX_CYCLES, otherwise when CONFIG_SYS_CLOCK_TICKS_PER_SEC is set to
a value less then the RTC frequency, the initially configured timeout
will be unnecessarily shorter.
On the occassion, remove also the call to counter() when setting the
initial timeout value in non-tickless mode. RTC is cleared a few lines
above, so at this point it will most likely be 0, and even if it was
not, compare_set() would properly handle a target time value that had
already passed.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-01-17 17:00:16 +01:00
Andrzej Głąbek 3ffaaa989a drivers: nrf_rtc_timer: Always announce actual number of elapsed ticks
In non-tickless mode, the timeout handler always announced maximum 1
tick to kernel, but in fact it cannot be guaranteed that the handler
execution is not delayed and that the number of elapsed ticks does not
exceed 1. Use the actual number instead.
Switch also to using a 32-bit value for `dticks` to get a bit simpler
generated code (ticks delta is not supposed to be that huge).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-01-17 17:00:16 +01:00
Andrzej Głąbek a98316ba09 drivers: nrf_rtc_timer: Fix checking of maximum timeout value
Align the condition checked in compare_set_no_locks() with what
set_absolute_alarm() actually provides (and slightly correct the
latter function so that it provides what it is supposed to).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-01-17 17:00:16 +01:00
Andrzej Głąbek e5aa0ab796 drivers: nrf_rtc_timer: Check channel bit when handling force_isr_mask
Add missing masking against `BIT(chan)` when handling a forced ISR
to avoid unnecessary processing of multiple channels instead of just
the one that actually requires it.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-01-17 17:00:16 +01:00
Andrzej Głąbek ac96b86493 driver: nrf_rtc_timer: Remove unnecessary setting of comparator
Remove a piece of code that was supposed to bring an extra update
of the anchor value but which in fact was not able to provide it,
because of the target time checking performed in process_channel(),
and which is anyway unnecessary because the timeout span is limited
to MAX_CYCLES in sys_clock_set_timeout(), so the timeout handler is
guaranteed to be executed at least twice per each RTC overflow.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-01-17 17:00:16 +01:00
Andrzej Głąbek 205e684958 drivers: nrf_rtc_timer: Rework set_absolute_alarm()
Eliminate waiting for a potential COMPARE event when setting a CC
value close to the previously set one and rely instead on checking
target time when processing channel events in the ISR.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-01-17 17:00:16 +01:00
Andrzej Głąbek bf1d3db1d4 drivers: nrf_rtc_timer: Simplify sys_clock_set_timeout calculations
Remove unnecessary decreasing of the number of ticks by 1 (it was then
increased by 1 when it was converted to the number of cycles) and add
a comment that clarifies the way that ticks < 1 are handled.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-01-17 17:00:16 +01:00
Francois Ramu c14670abea drivers: timer: lptim timer clock on stm32u5 has a prescaler
The stm32 devices shows a x2 factor on the LPTIM1,3,4
clock source but it acts as a prescaler.
The max lptim counter (timebase) is counting 4 sec
In that case, the LPTIM count unit is double.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-01-10 15:54:25 +00:00
Flavio Ceolin 24cb520698 timer: hpet: Remove deadcode
Move hpet_int_sts_set to inside HPET_INT_LEVEL_TRIGGER guard.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-01-09 12:07:28 -05:00
Sylvio Alves cff71c8d2b driver: systimer: increase esp32c3 tick resolution
hal_espressif systimer HAL calls are based on 1MHz reference.
This changes systimer driver to allow max clocking reference of 16MHz
and increases soc tick resolution by reducing min delay interval.

This also sets all ESP32-C3 socs to 16MHz hardware cycles reference.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-01-04 14:24:25 +01:00
Cyril Fougeray 6b4a4381de drivers: timer: stm32_lptim: load counter after checking for autoreload
Bug occurs when polling kernel uptime. Uptime was suddenly
jumping because lptim counter was counted twice
(from CNT and ARR registers) in case reload happens between
values are fetched.

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2022-12-20 22:51:01 +01:00
Daniel DeGrasse 4be1fb81ce soc: arm: nxp: switch imxrt boards to use systick timer unless CONFIG_PM=y
Switch all imxrt boards to use the systick timer by default, and only
enable the GPT timer when using low power modes. This is desirable
because the systick has a higher resolution, but the GPT can run
while the core clock is gated, making it useful for low power modes.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-12-16 09:31:48 +01:00
Krzysztof Chruscinski 336c1ad7d2 drivers: tiemr: nrf_rtc_timer: Add test function for shifting time
RTC is 24 bit width and k_timer is 64 bit. It is hard to test corner
cases but RTC hardware feature can help here. There is a task which
moves counter to 0xfffff0 which is close to overflow. However, there
is an internal driver state that also needs to be aligned to shift
the time properly. Adding optional function which triggers overflow
and updates internal state. This can be used for testing corner cases.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-11-17 11:24:23 +01:00
Krzysztof Chruscinski 31b25400ff drivers: timer: nrf_rtc_timer: Prevent prolonged timeout setting
CC setting algorithm is handling a case when CC is too soon (next
tick from now). It was setting CC to one tick further in the future
if that was detected. Step was repeated if counter incremented during
setting CC and CC was behind the counter because of risk of setting
CC too late. In certain scenarios we might spend a lot of time in
that loop, especially if optimization is turned off. Test shown that
loop was executed dozens of time (up. to 700us). To prevent
prolonged execution whenever CC setting fails we set CC to one more
tick further in future.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-11-09 10:46:19 +01:00
Kumar Gala e11074d2a7 drivers: timers: riscv: don't leak Kconfig symbols
Add if check around RISC-V machine specific kconfig symbols so they
aren't exposed to everyone.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-11-02 15:40:59 +09:00
Tom Burdick c548c1be1e timer: Revert "timer: HPET is also a lock free readable timer"
This seems to have caused CI failures and its unclear why just yet
so revert instead.

This reverts commit cbee9e9fdd8060d0ca4e91037b3f99f631e4b1a5.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-11-01 23:15:23 +09:00
Kumar Gala 0a7c25e649 drivers: timer: intel_adsp: Update driver to use dts Kconfig symbol
Update Intel ADSP timer driver to use DT_HAS_<compat>_ENABLED Kconfig
symbol to expose the driver and enable it by default based on
devicetree.

We remove setting 'default y' for the timer driver in
Kconfig.defconfig.series as that is now handled in the driver Kconfig.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-11-01 09:03:17 +00:00
Tom Burdick 2001d43f96 timer: HPET is also a lock free readable timer
Mark the timer as having a lock free read of the cycle count
so that spin lock debugging can include lock time asserts.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-10-31 21:28:29 -04:00
Mahesh Mahadevan d13ffceb62 timer: nxp: Update OS-Timer to use wakeup-source flag
Enable the OS Timer to be a wakeup source only if
configured through device tree property.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-10-27 11:03:13 +02:00
Kumar Gala fc95ec98dd smp: Convert #if to use CONFIG_MP_MAX_NUM_CPUS
Convert CONFIG_MP_NUM_CPUS to CONFIG_MP_MAX_NUM_CPUS as we work on
phasing out CONFIG_MP_NUM_CPUS.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-20 22:04:10 +09:00
Tom Burdick 94251ac843 timer: APIC timer count is a lock free accessor
Selects the hidden Kconfig to note that the APIC timer's cycle count
accessor is a lock free path and may use the spin lock time limit check.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-10-18 14:14:12 +02:00
Tom Burdick 6277386591 timer: cAVS cycle count is lock free
Select the Kconfig option noting that the cavs (intel adsp)
timer driver provides a lock free cycle count accessor and
therefore can be used with a spin lock time limit assert.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-10-18 14:14:12 +02:00
Tom Burdick 872e3553f9 kernel: Option to assert on spin lock time
Spin locks held for any lengthy duration prevent interrupts and
in a real time system where interrupts drive tasks this can be
problematic. Add an option to assert if a spin lock is held for
a duration longer than the configurable number of microseconds.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-10-18 14:14:12 +02:00
Gerard Marull-Paretas 178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Enjia Mai dcda15d17d drivers: timer: use sys_read64 to read HPET counter on 64 bits cpu
For 32 bit processor to read the 64 bits hpet counter, the HPET spec
2.4.7 suggest to read HPET counter high and low then checking the
high bits to decide if it rollovers or not.

But this logic seems to cause problem for 64 bits processor under SMP,
there is a possible one tick earier under tickless mode. It is likely
to be the cache coherence issue, because a mfence instruction before
reading the timer works.

So we change to read the 64 bits counter by sys_read64 on 64bit
processor to prevent this issue.

Fixes #49611

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-10-12 18:47:19 +09:00
Anas Nashif ede94516b0 drivers: intc_dw_ace: rename file
No need for the version in the file name, this will be used by multiple
versions of ACE.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Anas Nashif 0869e62539 intel_adsp: cleanup ace_v1x-regs.h more and prep for removal
File still not being removed due to out-of-tree usage. We will drop it
once the external code has stopped referencing it.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Anas Nashif 52297422fc timer: intel_adsp: use DTS for hardware information
Convert timer driver to use a light weight syscon and DTS and convert
register information to use offsets and sys_read/sys_write instead of
structs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Anas Nashif 059dc41cc6 intel_adsp: put interrupt defines in own headers/cleanup namespace
Cleanup soc.h and move interrupt defines into own headers. Rename some
of the defines for ACE to have a unified namespace.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Anas Nashif 100090832d drivers: intc: ace: use DW structure already defined in the driver
The DW register block was duplicated into the ACE header while we had
the same thing in the driver. Move everything to the driver as the first
step with further improvements planned on top of this.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-10-11 12:50:05 -04:00
Gerard Marull-Paretas ac63bca423 include: add missing sys_clock.h include
Some headers made use of types defined in sys_clock.h (e.g. k_timeout_t)
without including it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas 357b362824 include: add missing sys/time_units.h include
Some files using time_units.h API did not include it, e.g. for
sys_clock_hw_cycles_per_sec.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas 597dd5901c include: add missing spinlock.h include
Some files are using the spinlock API without including the necessary
headers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas 4ba74c2ec9 include: add missing limits.h include
Some files used definitions found in limits.h (e.g. INT_MAX) without
including it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas 6a0f554ffa include: add missing kernel.h include
Some files make use of Kernel APIs without including kernel.h, fix this
problem.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas acc8cb4bc8 include: add missing irq.h include
Some modules use the IRQ API without including the necessary headers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas 34a6848887 include: add missing arch/cpu.h include
The sys* ops like sys_clear_bit are indirectly included via arch CPU
header. Other stuff like find_msb_set end up included via this header as
well.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Peter Mitsis d308ca5695 drivers: timer: adsp: Improve elapsed ticks calculations
It is better to use 64-bit variable types for calculating the number
of elapsed ticks than 32-bit variable types. This guards against the
propagation of calculation errors should the lower 32-bits of the timer
counter roll over multiple times before the timer ISR is serviced.

(Such a scenario can easily occur when pausing the system for an
extended period of time with a debugging device such as a Lauterbach.)

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2022-10-07 18:34:50 -04:00
Erwan Gouriou 2d740d42e0 drivers: timer: stm32_lptim: Change clock source config check sanction
A specific check is implemented lptim driver in order to ensure global
platform clock/tick configuration is in line with recommendations.
To respect portability principles, don't error out when a config
conflict is detected but generates a warning instead.
Also, since these are only recommendations, provide an option to override
the check. Besides automatically override when ZTEST is enabled, as some
kernel tests specifically configure tick freq to 100.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-21 18:39:07 +00:00
Flavio Ceolin 45465708f0 soc: intel_adsp: Add ACE soc series
ACE15_MTPM is one SOC from the ACE series. Organize
it following cavs pattern.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-09-09 16:03:59 -04:00
Erwan Gouriou d62450886b drivers: timer: stm32_lptim: Initialize static global variable
In some configurations, a udf instruction may be generated
when compiling code where static global variable lptim_clock_freq is
used as a divisor.
To avoid this, initialize variable on declaration so that compiler
could see that it can't be used uninitialized in this division.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-09 14:09:22 +00:00
Kumar Gala cc2c05a90c drivers: timer: Update drivers to use devicetree Kconfig symbol
Update timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.

We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-09-09 09:58:48 +00:00
Erwan Gouriou ec6f932ad2 drivers/timer: stm32 lptim: Fix frequency check
Aim is to error out on misconfifurations, not the other way round.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-07 15:39:16 +02:00
Gerard Marull-Paretas 79e6b0e0f6 includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.

The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.

NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-05 16:31:47 +02:00
Erwan Gouriou e8e72882e1 drivers: timer: stm32: Check return of clock functions
That will speed up debugging.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:41:59 +00:00
Erwan Gouriou 7f2cb0fd22 drivers: timer: stm32: Specific handling for L0 LSI
On L0 series, LSI runs at 37KHz while LPTIM driver only supports speeds
up to 32768Hz (to avoid counter overflow). Consequence is a time running
faster than reality (x1.13)
Solution to this is the implementation of the LPTIM prescaler support.

While moving driver configuration from Kconfig to DT, this case was
not taken into account and the effect was LPTIM counter overflow which
consequence is worse than the slightly faster timer.
Reproduce the initial behavior with this piece of code that will be
removed once prescaler support is available.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:41:59 +00:00
Erwan Gouriou 16c11138d5 drivers: timer: stm32: Adapt SYS_CLOCK_TICKS_PER_SEC
When using LPTIM as tick source, tick freq (SYS_CLOCK_TICKS_PER_SEC)
needs to be adapted to get a precise tick to LPTIM freq ratio.

This adaptation was done easily using Kconfig up to now (under
soc/st_stm32/common/Kconfig.defconfig.series).
Since driver is configured using device tree, this method should
be adapted. For the LSI case (default Kconfig case), rely on the
existing mecanism, which is also still used by OOT users.
For the LSE case, force the value manually in boards forlder.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:41:59 +00:00
Erwan Gouriou d056be2b38 drivers/timer: stm32: Re-instantiate warning message on lptim configuration
Following transition of lptim timer configuration from Kconfig to DT,
a warning message was set to inform users about this deprecation.
Due to errors in CI this message had to be removed while fixing the related
issues.
Now these issues are fixed, set the deprecation message again.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:41:59 +00:00
Erwan Gouriou f818b0478d drivers/timer: stm32: Enable lptim driver based on dt status
Similarly to other drivers, use auto generated DT_HAS_<COMPAT> Kconfig
symbol to control use of STM32 lptim driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:41:59 +00:00