Most CPUs have instructions like LOCK, LDREX/STREX, etc which
allows for atomic operations without locking interrupts that
can be invoked from user mode without complication. They typically
use compiler builtin atomic operations, or custom assembly
to implement them.
However, some CPUs may lack these kinds of instructions, such
as Cortex-M0 or some ARC. They use these C-based atomic
operation implementations instead. Unfortunately these require
grabbing a spinlock to ensure proper concurrency with other
threads and ISRs. Hence, they will trigger an exception when
called from user mode.
For these platforms, which support user mode but not atomic
operation instructions, the atomic API has been exposed as
system calls.
Some of the implementations in atomic_c.c which can be instead
expressed in terms of other atomic operations have been removed.
The kernel test of atomic operations now runs in user mode to
prove that this works.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Several places in the code have constructions like this:
if (bool_variable) {
atomic_set_bit(flags, FLAG);
} else {
atomic_clear_bit(flags, FLAG);
}
To reduce the amount of code for such situations, introduce a new
atomic_set_bit_to() helper which lets you condense the above five
lines to a single one:
atomic_set_bit_to(flags, FLAG, bool_variable);
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Fix misspellings in documentation (.rst, Kconfig help text, and .h
doxygen API comments), missed during regular reviews.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
There are some cases where atomic_and/or don't need to be
checked. Actively acknowledge these cases.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Most kernel APIs are now ready for inclusion in the API guide.
The APIs largely follow a standard template to provide users
of the API guide with a consistent look-and-feel.
Change-Id: Ib682c31f912e19f5f6d8545d74c5f675b1741058
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Macro should not use {}, since atomic_t is a scalar type rather
than a structure.
Work by: Allan Stephens <allan.stephens@windriver.com>
Change-Id: Id0991b6ecf841e07015cad01351701bb61b4333c
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Based on review comments for previous patch at
https://gerrit.zephyrproject.org/r/3392.
The macro changed to ATOMIC_DEFINE since it reserves storage
and doesn't just announce its existence.
Change-Id: Ib6c2b76a219040694926823b94daf6fe779a05d0
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The atomic_t API supports arbitrary sized bit fields which are not
limited to a single atomic_t variable. This patch introduces a macro
to help declare right-sized atomic_t arrays given the number of bits
needed.
Change-Id: I226f6312b642551fc492df29d24764222f45ac83
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Arches now select whether they want to use the GCC built-ins,
their own assembly implementation, or the generic C code.
At the moment, the SDK compilers only support builtins for ARM
and X86. ZEP-557 opened to investigate further.
Change-Id: I53e411b4967d87f737338379bd482bd653f19422
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Change all the Intel and Wind River code license from BSD-3 to Apache 2.
Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Change all occurances of /*! to /** to match javadoc
style.
Change-Id: I3a759d34e0e928216f61252682266e64c5b875f8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add operations to manipulate individual bits in an atomic_t variable
or array of atomic_t variables.
Change-Id: I40133e203af36ebadbef93cfa1a9df04b62a94c9
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The atomic_get() function is a read-only API which doesn't modify the
value given to it. The input parameter should therefore be declared as
const.
Change-Id: I084b7beb623610412f9237fc9dae6139580e2636
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The atomic APIs are not really tied to nanokernel-specific
capabilities, and can be used by anyone at anytime -- even
during system initialization!
Change-Id: I427954029b4b465127cb5b4b642c2f9968c17d5a
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
