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16615 commits

Author SHA1 Message Date
Ryan McClelland 48e514f662 drivers: i3c: rename dcr i2c mode macro to lvr
This renames the I2C 'DCR' mode to 'LVR' as that is the variable it
should be looking at and not the dcr value. This also fixes the get
'lvr' mode argument.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2023-12-01 10:48:31 +00:00
Parthiban Nallathambi e9e430c40d can: mcp251xfd: fix compilation
Either switching to CAN_DEVICE_DT_INST_DEFINE with [1] missed
updating mcp251xfd or missed in merge. Fix using function
pointer for init in mcp251xfd.

[1]: https://github.com/zephyrproject-rtos/zephyr/pull/62925

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2023-12-01 10:48:23 +01:00
Francois Ramu de1bfd6a6e drivers: adc: stm32 adc fixing calibration for the stm32F1 serie
Configure the sw trigger just after calibration
So the conversion can start on regular channel on the
software control bit.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-11-30 12:22:46 +01:00
Dawid Niedzwiecki 75f7ffb2c9 Revert "timer: cortex_m_systick: handle cycle count overflow with idle timer"
This reverts commit 2ae09993ca.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-11-30 10:05:22 +01:00
Dawid Niedzwiecki 7388970c85 serial: stm32: do not clear TC flag in async mode
The Transfer Complete flag (TC) is used to check if a transfer is
complete. This mechanism is used before suspending the UART module to
make sure that all data are sent before the suspend procedure.

The UART ISR clears this flag after completion of a async transfer which
causes a hang during UART device suspend setup.

There is just no need to clear this flag in ISR, it is cleared every
time we start a new async transfer.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-11-30 10:04:57 +01:00
Yong Cong Sin e6f77f9b73 driver: intc: plic: fix trigger type register bit calculation
The bit position calculation for the trigger type is wrong,
fix that.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-11-30 10:04:43 +01:00
Bartosz Bilas 55f2d72cd4 drivers: eth_esp32: allow selecting ref clk source
In case of boards where REF_CLK signal is not connected
to the GPIO0 by default add the possibility to use
the optional GPIO16/GPIO17 as a REF CLK source.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2023-11-30 10:02:31 +01:00
Daniel Gaston Ochoa 50f64eaeba drivers: spi: stm32h7: Use FIFO
Use H7 SPI FIFO to improve performance.

Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
2023-11-30 10:01:19 +01:00
Daniel Gaston Ochoa cb4f54535f drivers: spi: stm32h7: Simplify long function in small ones
Simplify and clarify spi_stm32_shift_m by splitting it in
3 smaller functions with clear names.

Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
2023-11-30 10:01:19 +01:00
Daniel Gaston Ochoa 02f46fb1f2 drivers: spi: stm32h7: Use a better name for ll_func_tx_is_empty
In H7, TXP indicates when its FIFO has room for, at least, one
packet. Thus, rename ll_func_tx_is_empty as ll_func_tx_is_not_full,
to be consistent in all platforms.

Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
2023-11-30 10:01:19 +01:00
Daniel Gaston Ochoa 2effd8cce7 drivers: spi: stm32h7: Move startMasterTransfer to transceive
Avoind calling startMasterTransfer multiple times in a
transaction by moving it to the transceive() function.

Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
2023-11-30 10:01:19 +01:00
Marc Desvaux 1204aa25c8 drivers: usb: device: fix Rx FIFO min size
the FIFO Rx need to have a Minimum memory to works
distributed the rest of the ram_size memory between
the different TX FIFOs except the first which is
a control endtype with max data payload of 64 bytes

Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
2023-11-30 10:01:11 +01:00
Jakub Michalski 56bb73d7c7 console: fix '\r' and '\n' handling in uart_console_isr()
Receiving uart messages like: "\r*\n*\n" ('*' is a wildcard here) resulted
in invalid echo and invalid console_getline() output.
For example after receiving "\rabc\nd\n" uart_console_isr() echoes
"\r\nabcd\r\n" (note that "\r\n" before 'd' is missing) and after calling
console_getline() twice we received "" and "abcd".

uart_console_isr() changes single occurences of '\n' and '\r' to "\r\n" and
to avoid outputting "\r\n\r\n" after receiving "\r\n" it keeps track of the
last character. But it was tracking only the control characters not all
characters so in case of inputs like "\r*\n" the '\n' was omitted because
the last tracked character was '\r'.

Its fixed by tracking last character no matter of its type

Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2023-11-29 17:16:35 -05:00
Fabio Baltieri 76791cd708 input: kbd_matrix: add a input_kbd_matrix_drive_column_hook option
Add an option to call an application specific hook when setting the
column to scan. This makes it possible to handle application specific
quirks.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-11-29 18:18:09 +00:00
Adrian Bonislawski 53df6efeb6 watchdog: intel_adsp: fix num cpus
This will allow to init watchdog on HW's supporting different
number of cpus and watchdogs based on runtime arch_num_cpus

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2023-11-29 11:42:15 -05:00
Fabio Baltieri f9ab050306 drivers: gnss: move gnss_publish.h in include/
Move gnss_publish.h in include/ so that out of tree drivers and tests
can use it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-11-29 14:30:40 +00:00
Fabio Baltieri 96b9bd4720 drivers: gnss: use absolute values for signed fractionals
Printing fractionals currently put the sign on integer values on the
fractional part, for example:

longitude : -6.-207483333

Run an extra abs to get rid of the sign there for latitude, longitude
and altitude, compute the sign separately so it works for numbers
between -1 and 0 as well.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-11-29 14:30:40 +00:00
Adam Wojasinski e654cb65b8 drivers: watchdog: wdt_nrfx: Add support for new instances
Add support for WDT30, WDT31, and WDT130

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-11-29 13:12:42 +01:00
Marcin Szymczyk 2a38230a31 drivers: spi: nrfx: add dependency to PPI for PAN 58 on nRF52832
While enabling workaround for PAN 58 the PPI driver is used.
This requires the nrfx PPI driver to be enabled thus CONFIG_NRFX_PPI
Kconfig symbol needs to be set.

Jira: NRFX-1616

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2023-11-29 11:30:04 +01:00
Chaitanya Tata 0a1eff8d97 drivers: spim: Move the length check to beginning
This check has to be done independent of whether RAM is used for buffers
or not and depends on device maximum length property.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2023-11-29 11:30:04 +01:00
Chaitanya Tata 2c0f121727 drivers: spi: spi_nrfx_spim: Use generic macro for RAM address check
Instead of assuming only RAM is accessible by EasyDMA, use the generic
DMA accessible function.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2023-11-29 11:30:04 +01:00
Adam Wojasinski 058eebe479 drivers: spi: spi_nrfx_spim: Add additional symbol check for frequency
Some targets may not have `NRF_SPIM_HAS_32_MHZ_FREQ` or
`NRF_SPIM_HAS_16_MHZ_FREQ` symbols but have `NRF_SPIM_HAS_PRESCALER`
symbol defined. The symbol informs that target supports 32 MHz and
16 MHz frequencies for SPIM instances.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-11-29 11:30:04 +01:00
Adam Wojasinski e6bcc986bf drivers: spi: spi_nrfx_spim: Include nrf_clock.h only for nRF5340
The CLOCK HAL header is only needed for nRF5340 SoC. It's used when
user wants to configure SPIM instance to 32 Mbps. The HAL checks
if is running at 128 MHz as only then 32 Mbps is supported.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-11-29 11:30:04 +01:00
Andriy Gelman 447bdaa506 drivers: ethernet: eth_sam_gmac: Fix ptp adjust
NSEC_PER_SEC is an unsigned literal which will promote variable increment
to unsigned for the comparison operation, thus returning -EINVAL for
negative increment values.

For positive increment, -NSEC_PER_SEC becomes a large unsigned value
which will also return -EINVAL.

Fix by casting NSEC_PER_SEC to an int.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-11-29 09:53:47 +00:00
Armin Brauns 4321f86f1e drivers: allow setting BlueNRG public address
The zephyr bluetooth stack expects the controller to know its public
address, if any. At least for BlueNRG, the public address is forgotten with
every reset/power cycle, so there needs to be a way to set it from within
zephyr. This is accomplished using the `Aci_Hal_Write_Config_Data` HCI
command, as described in PM0237.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2023-11-29 10:44:25 +01:00
Armin Brauns 57b04c1eb0 drivers: refactor BlueNRG SPI driver for more config options
"LL only" is not the only config option of potential interest, e.g. the
public address is also important.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2023-11-29 10:44:25 +01:00
Armin Brauns 5b1b260f80 bluetooth: add HCI driver parameter to set controller's public address
This allows HCI drivers to expose vendor-specific functions to set the
public address.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2023-11-29 10:44:25 +01:00
Ryan McClelland 1e91453005 drivers: i3c: cdns: use deterministic timeout for idle
Previously, the idle bit would be read for X amount of times. This
could vary alot depend on the CPU speed. Timeout is now to happen
from the cycle time.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2023-11-29 10:29:30 +01:00
Marek Pieta 8d8e2b0f42 drivers: usb: nrf_usbd_common: Remove unneeded assertion
Code uses local RAM buffer to properly handle the case where provided
USB transfer TX data is not in RAM.

Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
2023-11-29 10:22:25 +01:00
Wojciech Sipak 76c8bf0f7c drivers: interrupt_controller: intc_plic: rewrite get_plic_dev_from_irq
There's a ternary operator that depends on configuration-defined macro:
`CONFIG_DYNAMIC_INTERRUPTS` is not enabled by default
for any of the platforms that use PLIC,
it is possbile to set it to `=y` though.

This triggered the Coverity check to report it as dead code.

Fixes #65576.

Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
2023-11-29 10:09:48 +01:00
Lukasz Majewski f4a039e218 drivers: net: lan865x: Add support for setting T1S PLCA configuration
This commit provides support for changing PLCA parameters stored in
lan865x_config_plca structure.

After values are updated, the LAN865x needs to be reset and then
configured with new values.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2023-11-29 10:06:30 +01:00
Lukasz Majewski dd5027067a drivers: net: lan865x: Disable protected transmission mode before reset
The LAN865x device after HW reset supports only the non-protected control
transmission mode. When it is reset alone - without resetting already
configured HOST system - one must assure that in HOST's OA TC6 driver
the protection SPI transmission support is disabled.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2023-11-29 10:06:30 +01:00
Lukasz Majewski 5cdf2f0eb7 drivers: net: lan865x: Move reset setup code to dedicated function
The ctx->reset member of struct lan865x_data shall be cleared each time
one wants to reset the LAN8651 device.

Before this change this value was only initialized in the lan865x_init().

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2023-11-29 10:06:30 +01:00
Lukasz Majewski 9d8100f43f drivers: net: lan865x: Move PLCA configuration to dedicated structure
This change allows modification of the PLCA configuration in the lan865x
driver.

Values in this structure can be set via device tree as well as modified
by the user program.

Without this change the latter use case would not be possible as the
struct lan865x_config structure is defined as read only and its data
is only provided by device tree.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2023-11-29 10:06:30 +01:00
Declan Snyder fa73697735 drivers: eth_nxp_enet: Support PTP
Support PTP functionality in NXP ENET MAC driver

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder d85171fe6f drivers: ptp_clock: Add NXP ENET PTP Clock Driver
Add Driver for NXP ENET PTP Clock device

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder cc5bd51177 drivers: ptp_clock: Add init priority Kconfig
Add ptp clock driver init priority kconfig

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder 809e936c5e drivers: clock_control_mcux_ccm: Add ENET PLL clk
Add subsys value for ENET PLL / ENET Ref clk to CCM Driver

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder fe809c8b24 drivers: ethernet: Add NXP ENET Driver
Add driver for NXP ENET which is a rework of the old
eth_mcux.c driver which had become unmaintainable due to
fundamental problems with the lack of PHY abstraction.

eth_mcux.c and the corresponding compatible nxp,kinetis-ethernet
will be deprecated and this new driver will be supported instead.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder b669d58337 drivers: mdio: Add NXP ENET MDIO driver
Add driver for NXP ENET MDIO functionalities

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder 5724ce78fc drivers: ethernet: phy: Add KSZ8081 PHY Driver
Add Driver for KSZ8081 Ethernet PHY. The Generic MII Driver
is not sufficient to use for this PHY chip which has special
vendor implemented behaviors.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder 7e88ab54e2 dts: bindings: ethernet-controller: Add phy mode
Add a property to the ethernet controller binding
indicating what type of connection the MAC has with
the PHY device.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Declan Snyder 4a8d9a1ef3 drivers: clock_control: mcux_ccm: Add ENET clock
Add ENET clock value to the CCM clock decoder
for both RT10XX and RT11XX CCM versions.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-28 14:34:02 -06:00
Emilio Benavente 2f68ad7f89 drivers: spi: spi_mcux_lpspi: Added RTIO Support for LPSPI
Provided APIs to support RTIO with the LPSPI driver.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2023-11-28 12:11:52 -06:00
Emilio Benavente 776519075b drivers: spi: Kconfig.mcux_lpspi: Added RTIO Kconfig for lpspi
Added Kconfig that switches RTIO Support in the LPSPI driver.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2023-11-28 12:11:52 -06:00
Christopher Friedt 37e19451ec drivers: misc: devmux: a device multiplexer pseudo-device
The Device Multiplexer (devmux) is a pseudo-device that can
be used to select between multiple included sub-devices.

It is experimental, but its current use is in system
remediation. Take for example, the scenario where the
system console and log subsystem both have the uart backend
enabled. The case may arise, where the chosen backing uart
could be an abstraction of another very high-bandwidth bus
- such as a PCIe BAR, a UDP socket, or even even just memory.

If the "service" (for lack of a better term) that backs this
abstract "uart" experiences an error, it is of critical
importance to be able to switch the system console, uart log
backend, or whatever to another uart (semi-transparently) in
order to bring up a shell, continue to view system logs, or
even just support user console I/O.

Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2023-11-28 15:35:39 +01:00
Fabio Baltieri d14066b061 drivers: gnss: add a generic NMEA GNSS driver
Add a generic NMEA GNSS driver.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-11-28 15:33:28 +01:00
Benjamin Perseghetti 0fa204b9fd drivers: net: phy: add tja1103
Adds the tja1103 enet phy for setting phy options on the mr_canhubk3.

Co-authored-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
2023-11-28 08:07:44 -06:00
Manuel Argüelles d2ea187228 drivers: mdio: add support for NXP S32 GMAC
MDIO controller is part of GMAC and it requires GMAC ethernet driver to
initialize first because it will reset the whole GMAC hw block during
initialization. Both C22 and C45 APIs are supported.

Co-authored-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
2023-11-28 08:07:44 -06:00
Balsundar Ponnusamy ffffab6ba6 drivers: watchdog: wdt_dw: resetting CPU or SoC is not configurable
specific to platform, watchdog reset line can be connected either to
CPU, SOC or none of the entity. These resets cannot be configured from the
application. So added a warning message when application configures this
option

Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
2023-11-27 20:00:29 +01:00