Commit graph

6 commits

Author SHA1 Message Date
Manuel Argüelles b38dab48c6 counter: nxp_s32_sys_timer: use clock control APIs
Use clock control API to retrieve the counter module's frequency and
update the boards using it to provide the source clocks.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-29 16:29:31 +02:00
Manuel Argüelles d212e50eaf soc: nxp_s32: enable RTU.PIT timers for S32ZE
Each RTU includes one PIT instance that can be used by any
of the cores.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-29 09:47:35 +02:00
Manuel Argüelles be08ce18d0 wdt: nxp_s32: use clock control APIs
Use clock control API to retrieve the module's frequency and
update the boards using it to provide the source clocks.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-22 09:24:32 +02:00
Quang Bui Trong e63d1389a9 boards: arm: s32z270dc2_r52: enable watchdog support
Enable RTU.SWT (Real-Time Unit.Software Watchdog Timer) instances on
 s32z270dc2_r52 boards. Module clock frequency is fixed to 48 Mhz.

Signed-off-by: Quang Bui Trong <quang.buitrong@nxp.com>
2022-12-27 10:36:42 +01:00
Manuel Arguelles 2477de86f0 boards: arm: s32z270dc2_r52: enable System Timer
Enable RTU System Timer Module (STM) instances on
s32z270dc2_r52 boards. Module clock frequency is fixed to
133.333333 MHz.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-11-30 11:29:39 +01:00
Manuel Arguelles 41c36357bd soc: arm: introduce NXP S32Z/E support
This patch introduces support for NXP S32 devices, specifically for
S32Z27 from S32Z/E family.

NXP S32Z27 processors are composed of two Real-Time Units (RTU)
containing each four ARM Cortex-R52 cores with flexible split/lock
configuration, and dedicated internal SRAM.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-14 09:51:14 +02:00