This code was using strptime from the C library in some cases,
but this function is an extension which many embedded libCs do
not provide, and which is not provided by default unless
_XOPEN_SOURCE or a similar macro is defined before the system headers
are included.
We could define _XOPEN_SOURCE for the libraries that provide it,
but instead of treating the host C library differently than
embedded libraries, let's just build the provided version always,
as that should provide better coverage of this code.
Note: It seems picolibc's strptime is broken,
until this very recent patch:
https://github.com/picolibc/picolibc/pull/657
so we should not select it when building for this library
for a while either.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This file uses several functions which are extensions to the the
std C library. Let's explicity select one of the extensions
which includes it instead of relaying on somebody having
set it for this file somewhere else.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This file uses several functions which are extensions to the the
std C library. Let's explicity select one of the extensions
which includes it instead of relaying on somebody having
set it for this file somewhere else.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This file uses several functions which are extensions to the the
std C library. Let's explicity select one of the extensions
which includes it instead of relaying on somebody having
set it for this file somewhere else.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This driver doesn't use any APIs outside of the Zephyr C library list, so
it doesn't need this _POSIX_C_SOURCE define.
Signed-off-by: Keith Packard <keithp@keithp.com>
soc\riscv\andes_v5\ae350\soc.h was empty and deleted,so revise
wdt_andes_atcwdt200.c to resolve
'fatal error: soc.h: No such file or directory'.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Use 'struct uc81xx_tres16' for 16-bit 'tres' setup, instead of 'struct
uc81xx_tres8'. This fixes a regression when support for 'uc8175' was added
and 'struct uc81xx_tres' was replaced with 'struct uc81xx_tres16'.
Fixes: 7c46b0b898 ("drivers: display: uc81xx: add support for uc8175")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
- In `set_vendor_ie_header_lm`, case when
`link_metrics_data_len == 0` has been ignored.
This commit fixes that by setting `header_ie->length = 0`
before returning.
- current implementation of enh ACK header IE returns
`-ENOTSUP` when `ack_ie.header_ie == NULL` or
`ack_ie.header_ie->length == 0`. This commit fixes that by
refactoring checks in `nrf5_configure`.
Co-authored-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
Signed-off-by: Maciej Baczmanski <maciej.baczmanski@nordicsemi.no>
Mute GPIO mutes both channel 1 and channel 2.
So, only control it when all channels have to be muted.
Signed-off-by: Benjamin Lemouzy <blemouzy@centralp.fr>
Use gpio_is_ready_dt in the driver for the TLE9104 before
actually using the GPIO.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
In some hardware designs it might happen that the reset signal
for the TLE9104 is not used only for this purpose, but instead for
instance to reset other devices at the same time. For such a hardware
design it is then necessary to make the reset GPIO optional. The reset
will have to be triggered earlier on.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This implements the daisy chain feature of the low side switch
BD8LB600FS. The daisy chaining is in hardware achieved via
connecting the MISO and MOSI lines of multiple instances of the IC
in a row. It is implemented in the driver through a variable number
of GPIOs on one instance. Therefore, one device tree instance of the
IC will handle multiple daisy chained physical instances.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Add support for more than 2 I2S channels to the I2S Flexcomm driver.
Additionally, remove comment stating I2S PCM and Left justified formats
are not supported, as these formats are now validated to function
correctly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The implementation uses the same approach as STM32F1x.
Program/erase speed can be set by setting 'write-block-size' flash
property to 1, 2, 4 or 8.
Signed-off-by: Patryk Duda <patrykd@google.com>
Add a command line option which will seed the random generator
from /dev/urandom.
This can be usefull for some particular tests in which we are
interested in having different random numbers in each run,
but we cannot provide a different random seed from command line.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Remove receive and transmit timeouts which are no
longer useful as the RECEIVE_READY and
TRANSMIT_IDLE events will be used to efficiently
manage timeouts between transmit/receive calls.
Then update the the in-tree drivers using the
modem_chat module to omit the process timeout
parameter.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
With PM, when resuming from low power mode, reenable the RNG register
clocks and check the health register. If it is not set to the desired
value, it means we exit Suspend to RAM mode, and that the RNG needs to be
reinitialized.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Prevents the system to go in Suspend to RAM low power mode while ADC
measurement is in progress.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
When resuming from low power mode, if UART is disabled, this means that
we come from a mode that reset the registers, so we redo a full init of
the driver.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Fix a bug where after a standby, it was impossible to reenable a GPIO
clock.
A counter is incremented each time pm_device_runtime_get is called, and
decremented each time pm_device_runtime_put is called. The
clock is only enabled if this counter equals 1.
When configuring a GPIO (as input or output), the timer is incremented, and
when disconnecting it, it is both incremented and decremented. Thus the
next time we try to configuring it, the clock is not enabled (since the
counter will now be equal to 2).
This causes a problem when using low power standby mode: after wakeup all
clocks are disabled and the GPIO clock can not be reenabled.
This commit fixes this bug by not incrementing the counter when disconnect
is asked (or in other words incrementing it only when configuring either
an input or an output).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add support for a backup standby timer in STM32 LPTIM driver for cases
when the LPTIM is not available (ie standby low power mode).
A counter (typically RTC) is used for such a case.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove initialization of static variable to 0 to prevent resetting the
value when reinitializing the driver after resume from standby.
This has no impact since static variables are initialized to 0 by default.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Provide different loop delays to `wait_until_ready` based upon the
operation that we are waiting for.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Don't monopolise the CPU in `spi_nor_wait_until_ready`. For slow flash
chips, operations can take minutes (Full chip erase on MX25R is listed
as 120s typical, 240s max).
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This change marks each instance of the 'api' as 'static const'.
The rationale is that 'api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
When set, this GPIO controller has pins associated with the
keyboard controller. In this case the reg_gpcr property is
overloaded and used to write the keyboard GCTRL register
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit adds source and header files required for bmp581 I2C driver.
I have used bmp581_user.h to add more usage related definitions
but bmp581.h to add hardware related definitions.
Signed-off-by: Talha Can Havadar <havadartalha@gmail.com>
Signed-off-by: Gerhard Jörges <joerges@metratec.com>
The STM32 DMA driver supports cyclic mode by setting source_reload_en
and dest_reload_en. This causes the dma_callback to be called twice per
buffer run-through, at half-time and when wrapping back to the start of
the buffer.
However, the current implementation only calls dma_callback twice. When
wrapping the first time, it sets stream->busy to false and ignores
subsequent interrupts.
With this change, the busy flag is only cleared in non-cyclic mode.
Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
For series that have two sampling time common channels, only one was used.
This commit add the support for the second one. The first two different
acquisition time values are used for the sequence and all further values
must match either of them, otherwise generating an error.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This is driver limitation after removing CAN_FILTER_FDF flag #65108.
CANXL driver need to know CAN_FILTER_FDF for configuring Rx filter
so that it receives CAN classic or CAN FD frames when using non RX_FIFO.
So update driver that just supports CAN classic for non RX_FIFO.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Commit eeec09eb9a unintentionally modified
can_calc_timing_data() to be called with the nominal phase parameters
instead of the data phase parameters.
Before the change, the parameters were properly initialized in the macro
MCP251XFD_SET_TIMING_MACRO(inst, _data).
After the commit, can_calc_timing_data() gets called with the parameters
pointing to dev_cfg->common.sample_point instead of
dev_cfg->commom.sample_point_data.
This PR creates a separate function mcp251xfd_set_timing_data()
which calls can_calc_timing_data with the correct data parameters.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Just like for the old driver, for simulation, we cannot
get the UART regiter address for the pinctrl config structure
from DT, as that cannot match the one allocated at build time.
So let's override it at runtime with the correct address
which is stored in the UART config structure.
Also, do improve the condition for the busy wait during the poll_out,
for simulation, so we only busy wait if we will loop/the
Tx was busy.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The TLA2021 driver depends on it's i2c controller and therefore needs
to be initialized later. ADC_INIT_PRIORITY by default equals
KERNEL_INIT_PRIORITY_DEVICE which should be used by independent devices.
Using this by default causing projects to fail where this driver is
enabled implicitly through board configuration and the priority is not
explicitly set.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
This fixes following build error when rv32m1_vega_zero_riscy
board gets compiled:
implicit declaration of function 'INST_DT_CLOCK_IP_NAME'
Fixes#68012
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit introduces a driver for NXP's eDMA IP.
The main reasons for introducing a new driver are the following:
1) The HAL EDMA wrappers don't support well different
eDMA versions (e.g: i.MX93 and i.MX8QM). As such, a new
revision had to be introduced, thus requiring a new Zephyr
driver.
2) The eDMA versions found on i.MX93, i.MX8QM, and i.MX8QXP
don't use the DMAMUX IP (instead, channel MUX-ing is performed
through an eDMA register in the case of i.MX93).
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit updates the driver to use the flash layout pages,
rewriting it to utilize the flash_page_layout.c driver to
avoid duplicate code.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Several STM32 variants include both shared IRQs for some ADCs and
separate IRQs for others (for example, STM32G473 has 5 ADCs, ADC1 and
ADC2 share one IRQ while ADC3, ADC4 and ADC5 each have unique
IRQs). The STM32 ADC driver however previously only supported either
separate IRQ lines for each operational ADC in the devicetree or a
single shared IRQ for all operational ADCs in the devicetree which
prevented all ADCs from being usable at the same time when the variant
contained a mix of both shared and separate ADC IRQ lines (only either
all the shared or all the separate and one of the shared might be used
at most for one application).
To allow for all ADCs in an STM32 variant to be usable in a single
application, generate an ISR and initialization function for each
unique IRQn as defined in the devicetree and give the task of
initialization to the first ADC which connects to that particular
IRQ. Each ISR function will generate code to call the ISR for each ADC
associated with that IRQn as was previously done for
CONFIG_ADC_STM32_SHARED_IRQS, allowing an ISR to be shared for the
ADCs sharing an IRQ while simultaneously providing separate ISRs for
each IRQ. Thus, the only information required to have ADCs either
share an ISR or not is provided by the devicetree.
Signed-off-by: Michael R Rosen <mrrosen@alumni.cmu.edu>
