While recent browsers seem to transparently try to use https for
http://www.st.com/... URLs, they are effectively not working anymore, so use
https://www.st.com/... URLs instead.
curl http://www.st.com/en/evaluation-tools/nucleo-g070rb.html -m 5 -v
* Trying 104.89.117.48:80...
* Connected to www.st.com (104.89.117.48) port 80 (#0)
> GET /en/evaluation-tools/nucleo-g070rb.html HTTP/1.1
> Host: www.st.com
> User-Agent: curl/8.1.2
> Accept: */*
>
* Operation timed out after 5002 milliseconds with 0 bytes received
* Closing connection 0
curl: (28) Operation timed out after 5002 milliseconds with 0 bytes
received
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This is coming from devicetree and corrosponds to what we have in the
dts/bindings/vendor-prefixes.txt file.
This will allow for static filtering, especially with twister, i.e. no
need to build anything to know the vendor of a board
All of the vendor data was extracted automatically from the devicetree,
so some platforms might not have the right vendor or no vendor at all
right now, we need to fix some of the DTS information or do this
manually to get this 100% correct. But we are close.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The nucleo evaluation boards can be enhanced with shields for additional
functionality. Flat device tree overlays can be used to configure and
support these shields. Regrettably leds can not be simply added due to
a missing label. Tag leds with a label.
Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
Reviewed-by: Vasilij Strassheim <v.strassheim@linutronix.de>
Add gpio-keys codes for all boards. These are mostly INPUT_KEY_0 and so
on but I've used some more specific ones where it was obvious that
there's something else on the boards.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
So far pin identifiers were named after CN7 and CN10 connector names on
Nucleo-64 boards. In case of Nucleo-144 there are ST Morpho connectors on
both sides, but bigger (up to 72 instead of 38 pins on each side). First 38
pins out of 72 on each side usually map to the same pins (e.g. PA5 being
13th pin on right ST Morpho connector). This means that single ST Morpho
connector definition will suffice.
Leaving CN7 and CN10 (name of pin headers on Nucleo-64 boards) is confusing
in context of Nucleo-144 boards, since corresponding pin headers are named
CN11 and CN12.
Rename:
* s/ST_MORPHO_CN7_/ST_MORPHO_L_/
* s/ST_MORPHO_CN10_/ST_MORPHO_R_/
so that pin identifiers make more sense in context of Nucleo-144 boards.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
The `cpu-power-states` property needs to be defined at SoC dts files,
since it's a property of the SoC, not board.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add enabled vbat node for all boards of supported STM32 SoC series which
have the required adc node enabled.
Add volt-sensor alias pointing to said vref node.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Add enabled vref node for all boards of supported STM32 SoC series which
have the required adc node enabled.
Add volt-sensor alias pointing to said vref node.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
The boards folder uses ~142.8 MB, being the largest in the repository.
This is due mostly to board images, which are in most cases not
optimized for web content. This patch tries to address this problem by
converting all pictures to JPEG (quality 75) and by adjusting its size
up to 750 px (the width of the documentation content). Images that
specified a fixed width in rst files are converted down to that value
instead.
With this patch, folder goes down to ~53.5 MB from 142.8 MB (-~63%).
Note that this patch introduces a new set of binary files to git
history, though (bad).
The process has been automated using this quickly crafted Python script:
```python
from pathlib import Path
import re
import subprocess
def process(doc, image, image_jpeg, size):
subprocess.run(
(
f"convert {image}"
"-background white -alpha remove -alpha off -quality 75"
f"-resize {size}\> {image_jpeg}"
),
shell=True,
check=True,
cwd=doc.parent,
)
if image != image_jpeg:
(doc.parent / image).unlink()
for doc in Path(".").glob("boards/**/*.rst"):
with open(doc) as f:
content = ""
image = None
for line in f:
m = re.match(r"^(\s*)\.\. (image|figure):: (.*)$", line)
if m:
if image:
process(doc, image, image_jpeg, size)
image = Path(m.group(3))
if image.suffix not in (".jpg", ".jpeg", ".png"):
content += line
image = None
continue
image_jpeg = image.parent / (image.stem + ".jpg")
size = 750
content += (
f"{m.group(1)}.. {m.group(2)}:: {image_jpeg}\n"
)
elif image:
m = re.match(r"\s*:height:\s*[0-9]+.*$", line)
if m:
continue
m = re.match(r"\s*:width:\s*([0-9]+).*$", line)
if m:
size = min(int(m.group(1)), size)
continue
content += line
if line == "\n":
process(doc, image, image_jpeg, size)
image = None
else:
content += line
with open(doc, "w") as f:
f.write(content)
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Convert lptim configuration from Kconfig to device tree.
Note that some boards were using Kconfig default value (LSI),
which now has to be made explicit using device tree.
If not done already, enable the required clock node (lse/lsi).
Clean up related Kconfig bits when required.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Now that all drivers and all boards have been converted to the
use of PINCTRL, remove usage of PINMUX.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the pinctrl state name (default) for the PWM peripherals.
Changes performed based on the script proposed in
"boards: arm: stm32: add pinctrl state name for UART peripheral"
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the pinctrl state name (default) for the CAN peripherals.
Changes performed based on the script proposed in
"boards: arm: stm32: add pinctrl state name for UART peripheral"
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the pinctrl state name (default) for the I2C peripherals.
Changes performed based on the script proposed in
"boards: arm: stm32: add pinctrl state name for UART peripheral"
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the pinctrl state name (default) for the ADC peripherals.
Changes performed based on the script proposed in
"boards: arm: stm32: add pinctrl state name for UART peripheral"
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the pinctrl state name (default) for the UART/USART/LPUART
peripherals. Changes performed using the following Python script run
from the repository root:
```
from pathlib import Path
import re
for fpath in Path(".").glob("boards/arm/**/*.dts"):
lines = open(fpath).readlines()
is_stm32 = False
for line in lines:
if "stm32" in line:
is_stm32 = True
break
if not is_stm32:
continue
with open(fpath, "w") as f:
for line in lines:
f.write(line)
m = re.match(r"(\s+)pinctrl-0.*us?art.*", line)
if m:
f.write(m.group(1) + "pinctrl-names = \"default\";\n")
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Enable the pin control driver on all STM32 based boards. The following
script has been used to do this task:
```
from pathlib import Path
import re
for fpath in Path(".").glob("boards/arm/**/*_defconfig"):
lines = open(fpath).readlines()
is_stm32 = False
for line in lines:
if "CONFIG_SOC_SERIES_STM32" in line:
is_stm32 = True
break
if not is_stm32:
continue
lines += ["\n", "# enable pin controller\n", "CONFIG_PINCTRL=y\n"]
with open(fpath, "w") as f:
f.writelines(lines)
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Prescaler was misplaced in pwm binding, instead of timers binding.
For example, TIM6/TIM7 doesn't have PWM capability,
but have a prescaler.
This change also prepares the introduction of timer based counter
(which requires prescaler at timer level)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
nucleo_l476rg:
adds tim3 with pwm on pb4, changes tim2 pwm pin from pa0 to pb10.
As a result timers are available on arduino pins D5 and D6.
nucleo_wb55rg:
adds tim1 with pwm on pa8, changes tim2 pwm pin from pa0 to pa15.
As a result timers are available on arduino pins D5 and D6.
Use default prescaler (==1) for 32-bit timer and
10.001 for 16-bit timers, as these are commonly used.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Mass conversion of STM32 boards to dts based clock configuration has
left some minor whitespace issues. Fix these and some other whitespaces
in the affected files.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
The low power states 0∕1∕2 are added to the stm32l476rg
nucleo board, with default min residency values.
The substate-id is mapping the same Zephyr power state.
They correspond to the stm32l476 low power stop0/1/2 modes.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Updated arduino dtsi to map spi1 as arduino spi
- Made board's zephyr peripheral mapping more compact and added arduino
and st-link labels.
Signed-off-by: Nikos Oikonomou <nikoikonomou92@gmail.com>
PWM, as other peripherals should not be enabled as part of
default board configuration.
Fix this.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update PWM pinctrl signal names of all non-F1 STM32 boards.
`pwm` variant is not available anymore on non-F1 series.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Following migration of pinctrl configuration from pinmux.c files
to device tree and deprecation of pinctrl defines, remove
pinmux.c files when possible.
Additionally remove the CMakeLists.txt files when it makes sense.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move SPI pin configuration to device tree for all STM32 based
boards.
This should not bring any change in pin configuration.
Though, some adjuments have been made on following boards for
coherency:
* b_l4s5i_iot01a1: Removed "very-high-speed" on SPI3 MOSI pin.
Tested with no impact.
* black_f407zg_pro: SPI1 pins configured but not SPI1 node.
Removed pin config as not documented neither.
* sensortile_box: SPI2 pins configured but not SPI2 node.
Removed pin config as not documented neither.
* nucleo_g431rb/nucleo_g474re/nucleo_l476rg/nucleo_l4r5zi:
SPI2 and SPI3 pins were configured but missing.
Added since they were documented.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use the new DT facilities to configure ADC pinmux on all boards with
STM32 MCUs currently supporting the ADC.
Signed-off-by: Martin Jäger <martin@libre.solar>
Enable HW stack protection by default on all STM32 when possible.
This excludes all series based on M0(FO) and M0+(G0/L0).
Also this is made only on boards with enabled MPU (SRAM > 64K).
Cf similar change on nRF boards: #28470
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_ADC flag to for each adc pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_PWM flag to for each pwm pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_I2C flag to for each i2c pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_SPI flag to for each spi pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to avoid pin configuration conflicts between peripherals,
add CONFIG_SERIAL flag to for each serial pinmux configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:
- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
for macros which are equivalent to
DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name
Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.
This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear. As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Following other drivers, Kconfig based instances are now entirely
removed. In order to do this change, PWM nodes in board DT files have
been given a pwm{N} label so that both:
- DT API checks such as #if DT_HAS_NODE(DT_NODELABEL(pwmN)) can be
used (N being PWM instance number).
- DT references can be written as pwms = <&pwmN x y>; instead of
pwms = <&{/soc/timers@XXXXXXXX/pwm} x y>;
This approach is also used on the Linux Kernel.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
