Update DCNANO LCDIF IP to use shared lcd interface binding. This
requires changes to the RT5xx SOC and RT595 EVK, as this SOC
uses the LCDIF IP, and configures the clock for it based off
the new pixel-clock property.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce phy-clock property, which is used by MIPI devices to determine
the target clock frequency for the MIPI PHY. This property can vary
depending on the attached display and target framerate.
Update the MIPI DSI MCUX driver to utilize this property to configure
the MIPI host, and update the RT500 clock initialization to configure
the MIPI root clock based on this property.
Remove dphy-clk-div property from the MIPI DSI 2L binding, as it
is redundant with this change.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move definitions of the STM32 FDCAN specific registers to the front-end
driver implementation and implement remapping of these registers to/from
the standard Bosch M_CAN registers.
Some of the STM32 FDCAN register bit fields are limited in size compared to
the Bosch M_CAN specification. This is due to hardware limitations on the
number of elements in the various sections of the Message RAM. Add build
assertions to ensure the number of elements specified do not exceed the
hardware limitations instead of using custom definitions for these fields.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move definition of the NXP LPC MCAN specific Message RAM Base Address
register (MRBA) to the front-end driver implementation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Some Bosch M_CAN IP core implementations use a fixed Message RAM
configuration, other use a fixed memory area and relative addressing,
others again have custom registers for configuring the Message RAM.
Move the responsibility for configuring the various Bosch M_CAN Message RAM
addresses to the front-end drivers. This removes some of the front-end
specific code from the backend. Provide a helper function for configuring
the most common variations.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Expose the can_mcan_read_reg()/can_mcan_write_reg() along with all the
Bosch M_CAN register definitions for use in Bosch M_CAN driver front-ends.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Let the Bosch M_CAN front-end drivers supply their own register read/write
functions.
This is preparation for handling non-standard Bosch M_CAN register layouts
directly in the front-end and for accessing Bosch M_CAN IP cores over
peripheral busses.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use sys_read32()/sys_write32() instead of volatile struct for register
access. Be consistent in using unsigned constants in register
comparisons. Use locking around register read-modify-write operations.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is a draft to support more controller implementations
with these drivers. The goal is also to make it easier to port
this driver to the new UDC API later.
We use compatible, like st,stm24f4-fsotg to support and enable
vendor-specific quirk. The core of the driver remains generic,
and therefore described and enabled by snps,dwc2 compatible.
STM32F4 support requires PINCTRL, even though pinctrl API is
generic, not all platforms implement it, so we have to include
and compile it conditionally.
Now we also switch to use new snps,dwc2 compatible and
explicitly force the controller into device mode,
as we do not support other roles or role changes.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add definition for GHWCFG1..4 registers to be able to obtain basic
information about PHY, endpoints, and Data FIFO.
Add GGPIO defines for STM32F4 SoC family USB controllers.
This implementation uses GGPIO to enable transceiver, VBUS
detection, and a few other functions.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Align and sort defines according to the position in memory.
Remove unnecessary parentheses.
Fix USB_DW_DSTS_ENUM_SPD_MASK.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Cleanup includes, fix build and missing kernel header include.
Move copyright notice to the top.
USB_DW_* macros are a bit misplaced in register header,
which is supposed to be about registers only.
USB_DW macro is used to point to base of controller register set.
Move it to driver code and add a new variable in driver's configuration
that takes the base address of the instance. This also makes later
porting to UDC API and support multiple instances easier.
Remove redundant DW_USB_IN_EP_NUM and DW_USB_OUT_EP_NUM
macros. Do not limit number of endpoint register in
struct usb_dw_in_ep_reg as it does not reflect common
register mapping of the controller.
Fix build warnings caused by USB_DW_EP_FIFO and use base variable
to calculate data FIFO access register.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
In the case that there is a situation where the controller
oscillator start-up timer doesn't expire, or the SPI can't
read the CLKRDY bit the driver would hang during init.
The config option ETH_ENC28J60_CLKRDY_INIT_WAIT_MS sets
the time that the driver will wait for OST before returning
an ETIMEDOUT error.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
According to the coding guidelines "dynamic allocation is not allowed".
This commit removes handling invalid DMA capable buffers by allocating
temporary buffer in a valid memory region, considering them as errors.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Add GDMA support for esp32s3.
Remove suspend/resume since they are optional and do
the same as start/stop.
Fix possible null pointer derreference.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
I2C driver overwrites i2c_msgs buffers, which
causes statistics to fail counting.
This creates new variables to hold msg buffer information.
Fixes#57532
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Mutexs were added to improve the overlapping phenomenon
because there is a part that shares the i2c line.
Signed-off-by: yeongnam chu <yeongnam.chu@assaabloy.com>
Add a function to wait for the full (bulk) Nor-octoflah erase command.
When erasing the full octo-flash, the drivers waits until
the operation is ready and the external NOR mem becomes ready itself.
The full (bulk) erase operation lasts for several seconds.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Update KCONFIG for flash driver to depend on
DT_HAS_FIXED_PARTITIONS_ENABLED, since that is necessary for the
driver implementation
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Add driver for OpenTitan SPI host.
Tested and verified single SPI full duplex on opentitan_earlgrey in
Verilator.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
Add a semaphore to the entropy mcux caam driver
to make the driver thread safe, since some static
variables in the HAL can be the source of
some race conditions.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Rather than the rings, which weren't shared between userspace and kernel
space in Zephyr like they are in Linux with io_uring, use atomic mpsc
queues for submission and completion queues.
Most importantly this removes a potential head of line blocker in the
submission queue as the sqe would be held until a task is completed.
As additional bonuses this avoids some additional locks and restrictions
about what can be submitted and where. It also removes the need for
two executors as all chains/transactions are done concurrently.
Lastly this opens up the possibility for a common pool of sqe's to
allocate from potentially saving lots of memory.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Renamed CONFIG_ADC_GECKO to CONFIG_IADC_GECKO to eliminate confusion
between the Incremental ADC found on series 2 silabs gecko MCUs, and the
ADC found on earlier gecko series.
Signed-off-by: Jared Baumann <jared.baumann8@t-mobile.com>
Introduce a new SiP SVC subsystem to provide ARM Silicon Provider based
supervisory call services. SiP SVC service provides the capability to
send SMC/HVC call from kernel running at EL1 to hypervisor/
secure monitor firmware running at EL2/EL3 and also added SiP SVC shell
commands to exercise the service.
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
Add driver for communicating with EL3/EL2 layer using smc/hvc call
for Silicon vendor Provided services for INTEL AGILEX SOC FPGA.
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
Added device tree bindings and implementaion for setting the
spi controllers chip select setup and hold time settings.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
Most available AT45 flash chips have their first two sectors shorter
than the consecutive ones. Usually, the first sector is marked as 0a
and has its size equal to eight pages (one block) and the second one
(usually 0b) is the complement to the size of a regular sector.
This commits modifies the driver so that erasing of these first two
sectors is performed correctly. This modified behavior is configurable
with a new DT property so that it is still possible to also use legacy
AT45 chips that do not feature such sector split. Such legacy chips
usually also do not support the chip erase and sector erase commands,
so two more DT properties are introduced to cover that.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The HAL function PWM_SetupPwm does the inverse division to get the
number of pulses from the frequency.
In the case of a prescaler of 1 and a period of UINT16_MAX cycles
this would result in an uint16_t overflow.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The LSM6DSO16IS is a system-in-package featuring a 3-axis digital
accelerometer and a 3-axis digital gyroscope for industrial and IoT
solutions. The LSM6DSO16IS embeds a new ST category of processing,
ISPU (intelligent sensor processing unit) to support real-time applications
that rely on sensor data. The ISPU is an ultra-low-power, high-performance
programmable core which can execute signal processing and AI algorithms
in the edge.
https://www.st.com/en/mems-and-sensors/lsm6dso16is.html
This driver is based on stmemsc HAL i/f v2.02
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add STMEMSC_CTX I2C/SPI/I3C macros that can be reused among all STMEMSC
based ST sensor drivers to populate the stmdev_ctx_t stucture.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add test case for all drivers that are supporting the sensorhub
feature, and fix right away all the yet undiscovered issues.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
In the real MiV platform, UART does not have any interrupts routed to
the interrupt controller.
Up to this stage, the driver implemented a separate thread to simulate
interrupt operation to enable shell samples. This is not required anymore,
as Zephyr can run shell on interrupt-less UARTs.
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Re-enable reception on the UART instance when `UART_RX_DISABLED`
triggers, which can happen when errors occur on the line.
This stops the driver permanently moving into an unresponsive state.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The emulated espi and i2c bus controllers do not depend on CONFIG_EMUL
being enabled. When these fake bus controllers are enabled by their
assoicated compatible in the devicetree without CONFIG_EMUL it results in
linker failures for underlying peripheral emulators which may be difficult
to understand. The SPI config already depends on EMUL.
Make the ESPI and I2C emulated controllers depend on CONFIG_EMUL. Note:
This still allows linker failures if CONFIG_EMUL=n, but the linker failures
will be consistently at device driver instantiation due to a missing bus
controller. Regardless, this will be easier to debug when someone forgets
to enable CONFIG_EMUL.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
The nrfx SPI driver depends on semaphores, which require multithreading
support to be enabled.
Signed-off-by: Eivind Jølsgard <eivind.jolsgard@nordicsemi.no>
- Added initial version of Infineon CAT1 Flash driver
- Added binding file for infineon,cat1-flash-controller.yaml
- Added overlays for subsys/nvs and drivers/flash_shell
to support cy8cproto_063_ble, cy8cproto_062_4343w boards
- Defined erase-block-size in PSoC6 MPN dtsi.
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Use new nrfx hal function to memcpy from flash
instead of accessing the array directly.
That function is inlining a memcpy for real targets,
so there is no practical difference for those.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add charging mode support the PI3USB9201 emulator and add a backend API
for connecting/disconnecting a portable device partner.
Signed-off-by: Keith Short <keithshort@google.com>
Update the result callback routine to also provide information about the
charging mode role. This permits tests to validate plug/unplug events
detected by the BC1.2 device operating in charging mode.
Signed-off-by: Keith Short <keithshort@google.com>
This PR adds a driver for the BMI323, which implements
the following features:
* Enable and disable accelerometer and gyroscope respectively
* Set full scale for accelerometer and gyroscope respectively
* Set data rate for accelerometer and gyroscope respectively
* Get samples (x,y,z) from accelerometer and gyroscope respectively
* Get die temperature
* Set trigger to accelerometer data ready, and accelerometer any motion.
The driver implements device and device runtime power management. If
runtime management is used, it is initialized into the suspended state,
which soft-resets the device to achieve the lowest possible power
consumption, otherwise it is resumed when initialized. When resumed,
the bus is initialized, the feature engine is enabled, and INT1 is
initialized.
The driver only implements the SPI bus at this time. The driver is
prepared to be expanded with I2C support in the future.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Word size setting limited any SPI transaction to the frame
size. In addition to making the SPI inefficient this
broke drivers that set the word size. It appears that most
drivers use a one byte (8) size for this setting.
This change respects what I think is the intended use of
the word size setting. That is to set the length of
each element in a tx/rx buffer struct.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
Allow defining multiple instances of enc28j60.
Remove the ETH_ENC28J60_0 Kconfig option along with this.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Add the `full-duplex` property for the `microchip,enc28j60` node.
Replace ETH_ENC28J60_0_FULL_DUPLEX Kconfig option with this property.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
This patch adds MULTITHREADING as a dependency to the nrfx i2c driver.
The driver uses semaphores internally and can result in linker errors
if MULTITHREADING is not enabled.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Updated the code to to invoke reset using PCR block
z_mchp_xec_pcr_periph_reset() instead of resetting
using I2C Configuration register
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
