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Author SHA1 Message Date
Daniel Maslowski 6b495ceda9 dts: jh7110: fix memory definitions 
The L2LIM is 2MB in size, see:
https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/u74_memory_map.html
Rename it since there are other memory blocks such as the DTIM for the S7.

Signed-off-by: Daniel Maslowski <info@orangecms.org>
 2024-04-09 14:20:39 +02:00
Filip Kokosinski d60df3d0d5 boards/starfive/visionfive2: use riscv in the arch field 
This commit changes the value of the `arch` from `riscv64` to `riscv`, so
that it is in line with the rest of the RISC-V boards.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
 2024-03-14 11:00:02 -05:00
Pratik Farkase 5e346f553d boards: starfive: add visionfive2 board 
these list of patches add support the Starfive Visionfive2
SBC based on the JH7110 SoC. Board identifier is `visionfive2`.

Signed-off-by: Kanak Shilledar <kanakshilledar111@protonmail.com>
Signed-off-by: Pratik Farkase <pratik.farkase@wsisweden.com>
 2024-03-13 11:39:51 -05:00