Add myself to display collaborators list to aid in reviewing PRs, as I
have been working with SPI based and parallel displays within Zephyr
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Aaron Massey (aaronemassey - Google) doesn't have the cycles to remain a
maintainer on the charger subsystem. Robert Zieba (GRobertZieba - Google)
has been participating as a collaborator for the charger subsystem.
Remove aaronemassey as a maintainer of the charger subsystem and add
GRobertZieba as a collaborator.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Introduce MIPI DBI driver class. MIPI DBI devices encompass several
interface types. All interfaces have a data/command, reset, chip select,
and tearing effect signal
Beyond this, MIPI DBI operates in 3 modes:
Mode A- 16/8 data pins, one clock pin, one read/write pin. Similar to
Motorola type 6800 bus
Mode B- 16/8 data pins, one read/write pin. Similar to Intel 8080 bus
Mode C- 1 data output pin, 1 data input pin, one clock pin.
Implementable using SPI peripheral, or MIPI-DBI specific controller.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Few west areas are paired with the sensor labels right now, this causes
the issue assignee workflow to assign sensor issues to the maintainers
of these areas as well.
Drop those areas from the maintainer file, they should get some
different label if needed.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Typo in a files-exclude entry is causing get_maintainer.py script to
error out under certain conditions
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Create RA & RZ Renesas areas to maintain from previous
"Renesas platforms" area.
Moved rzt2m dtsi from R-Car to RZ area.
Add @soburi as Renesas RA maintainer.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
- Due to the incresing support for ZephyrRTOS in BeagleBoard boards, it
would be good to have this entry.
- Was discussed in Discord when asking for help for PR review
Signed-off-by: Ayush Singh <ayushdevel1325@gmail.com>
Create NXP Drivers group separate from the platforms.
The idea being that currently there are two problems:
- All the Drivers drivers are falling under the responsibility
of the MCUX platforms' maintainers, some of whom do not have the
cycles or interest to maintain these things.
- The maintainers of the other platform groups do not get counted
as reviewers of the Drivers drivers that their platforms use.
So, separate all the driver files from the MCUX platforms, and add the
relevant people who have an interest in maintaining the Drivers, including:
- At least one maintainer of each platform group, and
- The NXP contributors who are highly active in maintaining
and reviewing the NXP drivers in upstream Zephyr.
Another two problems this PR fixes:
- The platforms of the other NXP groups are still falling under the MCUX
group. Exclude the platforms of the other NXP groups from MCUX group.
MCUX group will still be the default group for unsorted NXP platforms.
- Add a few file paths to some of these groups to cover a few missed
files, and add description properties of the NXP groups.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Split out the HCI drivers from the main Bluetooth sections.
The contributors to those are usually silicon vendors.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
This is the "legacy" Bluetooth protocol.
lylezhu2012 (NXP) recently volunteered to maintain it.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
Add myself (decsny) as ethernet/mdio collaborator.
I have taken an interest in ethernet and am currently
maintaining and writing some ethernet/mdio drivers for NXP,
and would like to use the collaborator role to monitor the
zephyr activity of the ethernet/mdio subsystems.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
In order to avoid build failures as described in issue #67242,
make all ST drivers using HAL_ST module dependent to HAL_STMEMSC
and HAS_STLIB libs, which need to be configured in all samples
referring to them.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Gigadevice was inconsistent with the convention established by other SoC
families, that is, use <vnd_prefix>_<family>. For example, ST STM32 uses
st_stm32. Note that GD32VF103, under soc/riscv, has already been
adjusted.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Current setting missed some necessary files which should be
covered by Ambiq platforms. Add them in this commit.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Move things out from riscv-privileged, and create the new RISC-V GD32
family. New family folder follows the <vnd>_<family> naming convention.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Move various utilities out of lib into own folder for better assignement
and management in the maintainer file. lib/os has become another dumping
ground for everything and it the Kconfig and contents in that folder
became difficult to manage, configure and test.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Gone through orphaned files and added those to relevant areas and
created new areas. Initially, some of the areas have the minimal
required data, i.e. without maintainers or collaborators which can be
filled in later.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Just in an effort to reduce notifications in areas that I'm not
super actively involved in. I was getting a lot of false
positive notifications for sensors.
Feel free to ping me for individual reviews on
simplelink parts or TI HAL or radio drivers.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Moved folder to tests/boards/native_sim from native_posix
(including updating the MAINTAINERS file)
And enable all these tests for native_sim.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add Nuvoton guys, TomChang19 and alvsun, in collaborators of Nuvoton
NPCX Platforms and remove MulinChao and ChiHuaL since they are already
the maintainers.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Adding myself as a collaborator on ARM arch so that I can help maintain
the aarch32 cortex-a/r codes.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
