This function conflicts with a function of the same name in mcuboot.
This happens when building USB DFU support into mcuboot.
DFU over USB uses image manager and mcuboot internals to manage images
downloaded to the device.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Commit 0a7b45d55f ("ext: hal: atmel: sam: fix GMAC priority queues
related registers") tried to correct register offsets, but failed to do
so in the structure that is used by our driver to access the registers.
Fixes: #12945
Signed-off-by: Daniel Glöckner <dg@emlix.com>
There are issues using lowercase min and max macros when compiling a C++
application with a third-party toolchain such as GNU ARM Embedded when
using some STL headers i.e. <chrono>.
This is because there are actual C++ functions called min and max
defined in some of the STL headers and these macros interfere with them.
By changing the macros to UPPERCASE, which is consistent with almost all
other pre-processor macros this naming conflict is avoided.
All files that use these macros have been updated.
Signed-off-by: Carlos Stuart <carlosstuart1970@gmail.com>
This commit changes the names of SYS_POWER_DEEP_SLEEP* Kconfig
options in order to match SYS_POWER_LOW_POWER_STATE* naming
scheme.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Using Zephyr SDK 0.10.0-rc2, GNUCC 8.2.0 is used and
(__packed uint32_t *) are now generating warnings..
Replace with CMSIS macros __UNALIGNED_UINT32_READ and
__UNALIGNED_UINT32_WRITE
ST internal reference: 61328
Fixes#13237
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Using Zephyr SDK 0.10.0-rc2, GNUCC 8.2.0 is used and
(__packed uint32_t *) are now generating warnings..
Replace with CMSIS macros __UNALIGNED_UINT32_READ and
__UNALIGNED_UINT32_WRITE
ST internal reference: 61327
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Using Zephyr SDK 0.10.0-rc2, GNUCC 8.2.0 is used and
(__packed uint32_t *) are now generating warnings..
Replace with CMSIS macros __UNALIGNED_UINT32_READ and
__UNALIGNED_UINT32_WRITE
ST internal reference: 61325
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Using Zephyr SDK 0.10.0-rc2, GNUCC 8.2.0 is used and
(__packed uint32_t *) are now generating warnings..
Replace with CMSIS macros __UNALIGNED_UINT32_READ and
__UNALIGNED_UINT32_WRITE
ST internal reference: 61324
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Using Zephyr SDK 0.10.0-rc2, GNUCC 8.2.0 is used and
(__packed uint32_t *) are now generating warnings..
Replace with CMSIS macros __UNALIGNED_UINT32_READ and
__UNALIGNED_UINT32_WRITE
ST internal reference: 61323
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This patch fixes an issue with an uninitialized variable in the x509
mbedtls feature. I sent a related patch to the mbedtls project so
that this can be fixed in the future.
https://github.com/ARMmbed/mbedtls/pull/2392
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Changes in flash_map API makes flash_area structure proper
interface for point the image area instead of direct flash-bank-offsets.
This patch align code to changed APIa and allows to support operation
on the partition in any flash device.
Signed-off-by: Findlay Feng <i@fengch.me>
The latest update of the SAM E70 HAL (commit 6ad7e13608) shifted the
GMAC priority queues related registers by 4 bytes. It is not cleared
yet, if it is change is a mistake or a change from 0 based indexing
to 1 based indexing. Indeed the main queue is the number 0, and the
first priority queue is therefore the number 1.
In the meantime revert that change, and use the old registers addresses
matching the datasheet.
Fixes#12945
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Adds a shim layer around the mcux rtc driver to adapt it to the zephyr
counter interface. Portions of this driver are reused from the existing
rtc driver in drivers/rtc/rtc_mcux.c.
The hardware supports a single alarm only and a fixed wrap value.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add shim driver for i.MX EPIT (Enhanced Periodic Interrupt Timer)
peripheral which can be used for i.MX6SoloX, i.MX7D and other i.MX socs.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Adds a shim layer around the mcux elcdif driver to adapt it to the
zephyr display interface. Although the hardware and underlying mcux sdk
driver can support additional configurations, some shortcuts are
currently made in the shim that force a given pixel format, lcd data
bus width, and signal polarity. This works with the rocktech lcd module
used on imx rt boards, but will need to be updated for other display
panels.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
We forgot to include the mimxrt1060_evk_hyperflash board variant when
building mcux support for external memories.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit implements a CTF-backend for Zephyr's tracing API.
The CTF-backend itself is split in a middle-layer and a bottom-layer.
- Middle-layer decides the payload in event transactions,
- Bottom-layer implements the IO transport.
A simple POSIX bottom-layer is provided so far.
Signed-off-by: François Delawarde <fnde@oticon.com>
To be used in the implementation of a POSIX bottom layer to CTF Tracing.
Origin: William Swanson
License: MIT
URL: https://github.com/swansontec/map-macro
commit: 383c38e95e94d4dbd67ec7e31eff80cd317e3f8d
Purpose: Helper macros for CTF POSIX bottom layer.
Maintained-by: External
Signed-off-by: François Delawarde <fnde@oticon.com>
During recent refactoring of mbedTLS generic config file, a regression
slipped in that prevented MBEDTLS_PEM_PARSE_C from being set, even
though the option was selected in Kconfig. The reason for this is the
fact that this config has dependency to MBEDTLS_X509_CRT_PARSE_C but it
was moved above the line where MBEDTLS_X509_CRT_PARSE_C was actually
set. Therefore, this dependency was never satisfied.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Force Operation Mode Strap Override register to disable NANDTree. This
is due to some users reporting PHY entering NANDTree.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Boot PHY initialization timeout, caching mechanism fixes and networking
buffer descriptors moved to no cache section. Enabled cache management
in networking driver and manual barriers.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Update to new OpenAMP v2018.10 release. This release allows us to
utilize just rpmsg without remoteproc. The API set has changed and
requires updates to the openamp sample. Additionally, the changes
in this release reduce the code size footprint, and support a static
allocation memory model.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove conditionals with kconfig options that are not defined and for
drivers that are not supported.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Following the HAL import, reapply the part of commit 133306152 ("Add
missing header files symbols for Atmel SAM E70") which hasn't been fixed
upstream yet. From this commit, only the DACC alternate pin functions
have been fixed.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This is an import of Atmel SAM E70 HAL version 2.3.98, and only for the
revision A of the chip. The files have been passed through dos2unix to
minimize the differences with the previous version which seems to also
have been imported that way. All the patches that have been applied on
the previous version have been removed.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Adds a new config HAS_MCUX_ENET to constrain which socs can enable the
mcux ethernet driver. This will prevent users from enabling the driver
on socs like kl25z or kw41z which do not have ethernet mac hardware.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This library, written by STMicroelectronics, is used to convert an
audio stream from PDM format to PCM format through a signal filtering
and decimation.
Library is located in ext/hal/st/lib/audio.
Origin: ST Microelectronics
License: Apache 2.0
URL: https://os.mbed.com/
Commit: 25:f2c04f757003
Purpose: reconstruct the audio signal produced by ST MEMS microphone
Maintained-by: External
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Adding a binding .yaml file for Nordic FICR and the
corresponding macro definition for NRF_FICR in
nrfx_config_nrf9160.h header file.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit contributes a binding .yaml file for Nordic nRF
SPU peripheral and defines the macro for the peripheral base
register address in file ext/hal/nordic/nrfx_config_nrf9160.h.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Change fixes problem with mutexes and initialization for SystemView,
adds config options to:
- choose if SystemView should start logging events on system start
- select SystemView RTT buffer size
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
The OpenISA RV32M1 SoC has four CPU cores. Two of these are RISC-V
32-bit cores, which are named "RI5CY" and "ZERO-RISCY". (The other two
cores are ARM Cortex-M0+ and -M4.) This patch adds basic SoC
enablement for the RISC-V cores:
- basic dtsi, to be extended as additional drivers are added
- SoC definition in soc/riscv32/openisa_rv32m1 for RI5CY / ZERO-RISCY
- system timer driver for RI5CY, based on LPTMR0 peripheral
The timer driver will be generalized a bit soon once proper
multi-level interrupt support is available.
Emphasis is on supporting the RI5CY core as the more capable of the
two; the ZERO-RISCY SoC definitions are a good starting point, but
additional work setting up a dtsi and initial drivers is needed to
support that core.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Michael Scott <mike@foundries.io>
This provides a HAL for the OpenISA RV32M1 SoC.
Origin: open-isa-rv32m1 GitHub organization
URL: https://github.com/open-isa-rv32m1/rv32m1_sdk_riscv
Revision: 365b1060f0947d5250c07b3eebdbc9e54cd0246e
Maintained-by: External
License: BSD-3-Clause
Signed-off-by: Marti Bolivar <marti@foundries.io>
Revert 71ba2de7:
ext: stm32cube: stm32f4xx: shift I2SR field in PLLI2SCFGR register
(ST Bug tracker ID: 50086)
Revert 9a893202:
ext: stm32cube: stm32f7xx: shift I2SR field in PLLI2SCFGR register
(ST Bug tracker ID: 50108)
This two commits were introduced to shift the PLLR parameter according
to the PLL register field position. After analysis, it appears that
function is actually correct, and issue was actually in parameters
provided that didn't match the API. (see PR #12609)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Extend generic mbedTLS configuration file with MBEDTLS_HAVE_ASM option,
to allow the use of assembly code. This improves the performances of
asymetric cryptography, however depending on the architecture and the
CPU, this might have an impact on the code size.
Set the default value ot the previous non-configurable value, ie enable
it by default except on ARM.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
We have dependency on this module in code which is part of Zephyr. When
this module is split out of the tree we need to be able to build. Move
this Kconfig part to be part of zephyr and keep the external code in
ext/ with plan to split it out on the future.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Extend generic mbedTLS configuration file with MBEDTLS_AES_ROM_TABLES
option. This allows to save some RAM (~8kB) in favour of ROM and
performance.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
