Commit graph

26 commits

Author SHA1 Message Date
Anisetti Avinash Krishna 5925a4670b drivers: dma: dma_intel_lpss: Added intel LPSS DMA interface
Added intel LPSS DMA interface using dw common to support
usage of internal DMA in LPSS UART, SPI and I2C for
transfer and receive operations.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-05-26 10:06:00 -04:00
Anisetti Avinash Krishna c828e8cd02 drivers: dma: dma_dw_common: Added 64bit address transfer
Added support for 64bit address source and destination
usage for dw common.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-05-26 10:06:00 -04:00
Anisetti Avinash Krishna 54ecda63cf drivers: dma: dma_dw_common: Added missing break in switch
Added a break and corrected wrong usage of source
instead of destination.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-05-26 10:06:00 -04:00
Cyril Fougeray 1be72d9888 dma: callback with 2 status codes for successful transfers
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2023-05-08 09:57:32 +02:00
Tomasz Leman 705d1c2c04 drivers: gpdma: power flow refactor
This patch is refactoring device power flow routine. DMA instance will
not be power up after kernel initialization if device power management
is enabled. Power menager will power up device and its power domain if
device will be in use and disable it when it's no longer needed.

The DMA disabling part has not yet been implemented.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-25 16:19:45 +02:00
Sylvain Chouleur 705e1e7916 dma_dw: separate intel specific registers from synopsys ones
CFG register uses fields that are not defined in Synopsys databook of
Designware AHB DMA Controller.

Since current Zephyr code uses this driver only for the
intel_adsp_gpdma driver I assume that those fields are specific to
this DMA which is not the standard Designware one.

This patch allows to use either the standard Designware register or
the Intel one.

Signed-off-by: Sylvain Chouleur <schouleur@graimatterlabs.ai>
2023-04-07 13:22:25 +02:00
Tomasz Leman fbe930ad0e driver: gpdma: balance the pm usage
Because the DMA driver allows multiple start and stop calls for the same
instance and the same channel, we cannot rely on the error codes
returned by these functions to notify the device's power manager that a
device is still in use.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-03-21 18:10:41 +00:00
Kai Vehmanen e40859f787 Revert "dma: dw: Do not program SAR/DAR and CTL_HI/LO when using HW LLI"
Failures are seen with SOF digital mic capture test cases on Intel cAVS2.5
platforms if the SAR/DAR/CTL writes are skipped.

This reverts commit 08d9efb202.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-03-21 13:50:08 -04:00
Ranjani Sridharan b32b321f50 dma: dw: Poll to check for channel disable with timeout
After disabling the channel, it is recommended to poll with timeout to
ensure that the channel has actually been disabled. Without this,
reconfiguring the DMA again while the channel is active could lead to
unexpected behavior and/or DMA underruns.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2023-03-17 09:29:25 +01:00
Ranjani Sridharan 6226f9e6e4 dma: dw: fix the return value check
The WAIT_FOR() function returns the value of checked expression. So fix
the return value check to log and return the timeout error when checking
if the FIFO is empty during stop.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2023-03-17 09:29:25 +01:00
Ranjani Sridharan 08d9efb202 dma: dw: Do not program SAR/DAR and CTL_HI/LO when using HW LLI
When using the HW LLI, there is no need to program these resgisters.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2023-03-17 09:29:25 +01:00
Kai Vehmanen 0c0d73721e dma: dw: allow to stop in DW_DMA_SUSPENDED state
Allow DMA channel to be stopped even if it is in suspended state.
The current code in dw_dma_stop() supports this, but the recently
added early check for dw_dma_is_enabled() results in DMA stop
sequence to be skipped if the channel was in suspended state.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-02-19 20:37:26 -05:00
Kai Vehmanen 6422b2b094 dma: dw: fix include for chan_data
The conditional definitions are not correct as "chan_data"
is used without any include guards, but defined only if
CONFIG_DMA_DW_HW_LLI or CONFIG_DMA_DW_SUSPEND_DRAIN is defined.
Correct the declaration to match usage.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-02-19 20:37:26 -05:00
Tom Burdick 58312e6104 dma: Repeated start/stop support for gpdma
Allows for repeatedly calling start/stop on designwares gpdma.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2023-01-23 11:51:21 -08:00
Adrian Warecki 5d902ea621 dma: dw: Align error code for xrun reporting
The hda driver uses -EPIPE to signal xrun, as proposed in the alsa lib
https://www.alsa-project.org/alsa-doc/alsa-lib/pcm.html. This commit
changes the xrun error code in dw dma driver from -ENODATA to -EPIPE to
make it consistent across drivers.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-01-19 15:45:16 +00:00
Jaska Uimonen 43fe2bba37 drivers: dma: gpdma: reduce logging verbosity
Reduce logging verbosity in status call from INF to DBG as the function
can be called any given time i.e. eveything is fine even if the read and
write pointers don't differ.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-11-24 15:22:30 +01:00
Adrian Bonislawski fcbb8bb4fe dma: gpdma: disable interrupt
GPDMA should work with disabled interrupts in ctrl_lo
This also helps with stability in SOF scenarios

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-11-15 12:16:23 +00:00
Ranjani Sridharan 2bb63a2170 dma: dw: Fix compilation errors with CONFIG_DMA_DW_SUSPEND_DRAIN
This code was likely never used.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-12 22:27:10 -05:00
Ranjani Sridharan 2fb01e412f dma: dw: Fix return value in dw_dma_stop
Do not throw away the errors.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-11-09 21:42:13 +01:00
Jaska Uimonen 2389e446ab dma: gpdma: fix cfg_hi and cfg_lo initialization
If cfg_hi and cfg_lo are not set to zero in config setting, different
dma slot value is bitwise ORred to the previous set value. Thus fix it.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2022-10-27 17:09:27 +02:00
Adrian Bonislawski e5e7ee88a3 dma: gpdma: fix channel config
This will use DW_CFGH_DST instead of DW_CFGH_DST_PER
to correctly setup cfg_hi. This is critical for ALH transfer.

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-09-30 15:18:20 +00:00
Gerard Marull-Paretas fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Tom Burdick 06cc6fe7a0 dma: dw: Use a LLI pool per device
Multiple instances of the device would have inadvertently shared the
LLI pool potentially causing nasty bugs.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-04-14 15:06:02 -04:00
Tom Burdick 2f792c2de5 dma/dw_common: Update dma_dw_common from sof
Ports the SOF DesignWare DMA code to Zephyr.

Effectively replaces much of what was the designware driver as this
driver enables scatter gather which the older driver did not.

* Enables cyclic transfer description lists when the cyclic config
  param is given.
* Enables linear link position usage with cAVS GPDMA.
* Passes suspend/resume, scatter/gather tests.
* Provides status updates of the transfer through dma_get_status()
* Enables reloading a cyclic transfer with dma_reload()
* Enables dma handshakes using the dma_slot config param.
* cAVS specifics remain in the dma_cavs_gpdma driver.

Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-03-29 14:33:48 -04:00
Gerard Marull-Paretas cb9a279050 drivers: dma: dw_common: fix style issue
Fix a couple of issues reported by checkpatch:

ERROR:POINTER_LOCATION: "(foo*)" should be "(foo *)"

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-04 08:55:45 -06:00
Tom Burdick f9acacfd11 dma: dw: Common dw dma driver functionality
Move most of the designware driver into a common compile unit with a
a header that exposes the common functionality.

This allows for derivative hardware, such as that in intel's adsp (cavs)
to use the common functionality while extending.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-02-21 20:59:08 -05:00